Scaling chip-to-chip interfaces for next-generation communication equipment

现代的特点是无处不在的连接和环境智能，每台设备都连接到网络。预计到2020年，加拿大的网络总流量将在2015年的基础上翻一番，2020年全球联网设备数量将从2015年的163亿台增加到263亿台。这些不断增长的需求必须在不增加相关电子设备的成本、复杂性和功耗的情况下得到满足。全球260多太瓦时/年的通信基础设施能源消耗继续以惊人的每年10.4%的速度增长。这一趋势反映在芯片到芯片接口标准的演变中，其中指定的数据速率每4年翻一番。因此，在芯片之间传输比特的数字输入输出(I/O)电路的功耗和成本威胁着数字通信的整体进展，除非研究进展继续下去。

The modern era is characterized by pervasive connectivity and ambient intelligence, with every device connected to a network. Total network traffic in Canada is slated to double over 2015 levels by 2020 and globally there will be 26.3 billion networked devices in 2020, up from 16.3 billion in 2015. These increasing demands must be satisfied without increasing the cost, complexity and power dissipation of the associated electronics. The 260+ TWh/yr worldwide energy consumption of communication infrastructure continues to grow at a frightening 10.4% annually. The trend is reflected in the evolution of chip-to-chip interface standards, where the specified data rates double every 4 years. Hence, the power consumption and cost of digital input-output (I/O) circuits that shuttle bits between chips threatens to bottleneck overall progress in digital communication unless research progress continues.