Utilizing Run-Time Reconfiguration to Reduce the Static Power Consumption of FPGAs for Mobile Applications

本研究的目标是通过使用运行时重新配置将fpga的功耗降低到最低功耗处理器的水平。运行时重新配置，即FPGA在运行时改变其功能的能力，已成功地用于许多商用FPGA，以扩展FPGA的逻辑容量，超出当前硅工艺技术所能制造的范围。然而，对于电池电量有限的便携式设备，FPGA的逻辑容量不受当前工艺技术的限制，而是受小型电池的低功率输出的限制。运行时重新配置可能允许fpga优雅地交换性能以降低功耗，以便将当前低功耗fpga的功耗降低到最低功耗处理器的水平。

The goal of this research is to reduce the power consumption of FPGAs to the level of the lowest power consuming processors through the use of run-time reconfiguration. Run-time reconfiguration, the ability of an FPGA to change its functionality while under operation, has been successfully used in many commercial FPGAs to expand the logic capacity of FPGAs to beyond what can be manufactured by current silicon process technologies. For portable devices with limited battery power, however, the logic capacity of an FPGA is not limited by current process technologies but by the low power output of small batteries. Run-time reconfiguration potentially can allow FPGAs to gracefully trade performance for reduced power consumption in order to bring the power consumption of current low power FPGAs to the level of the lowest power consuming processors.