Cryogenic probestation for mm-wave monolithic quantum computing integrated circuits
Cryogenic probestation for mm-wave monolithic quantum computing integrated circuits
批准号:
RTI-2019-00550
负责人:
Voinigescu, Sorin
金额:
$10.93万
依托单位:
依托单位国家:
加拿大
项目类别:
Research Tools and Instruments
财政年份:
2018
资助国家:
加拿大
项目状态:
已结题
起止时间:
2018-01-01 至 2019-12-31
中文摘要
本设备申请旨在获得适合测试新型单量子阱和耦合量子阱电子和空穴自旋量子比特以及由量子比特和相关毫米波自旋操纵和读出电路组成的单片集成量子计算处理器的低温探针站。这些电路和量子位采用CMOS生产技术制造,工作温度为2k,比目前最先进的量子计算硬件高出一个数量级。所要求的探针站是独特的定制设计,允许在温度低至2 K,频率高达67 GHz的情况下在高达2.5特斯拉的可调磁场下进行晶圆上量子位和集成电路测试。该探测器的测试臂可扩展到覆盖140-220GHz范围。***单片量子处理器的研究由申请人的NSERC战略和NSERC发现基金资助,由英特尔多伦多公司支持,并由GlobalFoundries公司进行实物制造。它通过探索CMOS代工工艺中的新型原子尺度量子计算硬件来解决计算能力的持续扩展问题,这些硬件利用隧道效应,可以与经典的CMOS逻辑和微波模拟电子器件集成在同一芯片上。***目的是通过实验证明在硅衬底上超薄埋藏氧化物上基于薄Si和SiGe薄膜的耦合量子点量子比特结构。单量子位和多量子位将采用商用22纳米和12纳米全贫绝缘体硅(SOI)代工技术进行设计、制造和测试。量子比特将使用串联堆叠的n-MOSFET和p-MOSFET级联码实现,其中量子点将在每个顶栅极下方的薄半导体薄膜中形成,而量子点之间的隧道势垒以及电子或空穴纠缠和交换相互作用将由硅衬底中形成的后门控制。电子和空穴的自旋将通过施加在量子点门上的直流磁场和30-220 GHz范围内的毫米波信号来控制。随着尺寸的缩小,应用于栅极的更高磁场和更高频率信号导致量子点中更高的能量分裂,从而实现更高的温度操作。最终,77 k和室温操作是我们的目标。低成本、大批量生产、高温的量子计算机将彻底改变IT行业,并加强加拿大在该领域的领导地位。
英文摘要
This equipment application aims to obtain a cryogenic probe station suitable for testing novel single- and coupled quantum well electron- and hole-spin qubits and monolithically integrated quantum computing processors consisting of qubits and associated millimetre-wave spin-manipulation and readout circuitry. These circuits and qubits are manufactured in production CMOS technology and operate at temperatures of 2 K, more than an order of magnitude higher than current state-of-the-art quantum computing hardware. The requested probe station is unique and custom designed to allow for on-wafer qubit and integrated circuits testing at temperatures down to 2 K and at frequencies up to 67 GHz in the presence of adjustable magnetic fields up to 2.5 Tesla. The test arms of the probestation are expandable to cover the 140-220GHz range.***The research on monolithic quantum processors is funded by the applicant's NSERC Strategic and NSERC Discovery grants and supported by Intel Toronto and with in-kind fabrication runs by GlobalFoundries. It addresses the continued scaling of computational power by exploring novel atomic-scale quantum-computing hardware in CMOS foundry processes, which harness tunneling and can be integrated on the same die with classical CMOS logic and microwave analog electronics.***The objective is to experimentally demonstrate coupled quantum-dot qubit structures based on thin Si, and SiGe films on ultra-thin buried oxide on silicon substrates. Single- and multiple-qubits will be designed, fabricated and tested in commercial 22-nm and 12-nm Fully-Depleted Silicon on Insulator (SOI) foundry technology. The qubits will be realized using series-stacked n-MOSFET and p-MOSFET cascodes with multiple gates where quantum dots will be formed in the thin semiconductor film below each top gate, while the tunneling barrier and, therefore, electron or hole entanglement and exchange interaction between quantum dots will be controlled by the back-gate formed in the silicon substrate. The electron and hole spins will be manipulated using DC magnetic fields and mm-wave signals in the 30-220 GHz range applied to the quantum-dot gates. Along with shrinking dimensions, higher magnetic fields and higher frequency signals applied to the gates result in higher energy splitting in the quantum dots, enabling higher temperature operation. Ultimately, 77-K and room temperature operation is our goal. Low-cost, mass-produced, high-temperature quantum computers will revolutionize the IT industry and strengthen Canada's leadership in this field.
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