Phase I: High-performance clock multiplier units

我们在UBC的团队正在开发一种新型的时钟乘法器单元(CMU)。我们的系统利用我们实验室发明的新型射频移位器来开发一种比市场上现有的典型CMU更小的面积、更低的功耗和更高的频率的系统。一个关键的区别是为许多输出提供与输入频率相差较小的频率。我们的目标是开发一种评估板，该评估板可以根据所需的时钟倍增系数自动校准其性能，并演示原型的运行过程、电压和温度变化以及长期运行。这些技术里程碑是根据接受采访的公司的反馈确定的，这些公司表示，微电子市场需要一个高性能的CMU，以实现接入、基础设施和连接。受访公司表示，他们愿意在I2I第一阶段成功完成后，在工业环境中对我们的原型进行Beta测试，以期成为早期采用者。

Our team at UBC is developing a novel clock multiplier unit (CMU). Our system leverages a novel radio frequency shifter that was invented in our lab to develop a system with a smaller area, lower power consumption, and higher frequency than a typical CMU existing in the market. A key differentiation is to provide many outputs with fractional frequency shifts from the input. Our goals for this proposal are to develop an evaluation board that can automatically calibrate its performance based on the required clock multiplication factor, and demonstrate operation of the prototype over process, voltage, and temperature variations and long-term operation. These technical milestones were set based on feedback from companies that were interviewed and who indicated a need for a high-performance CMU within the microelectronics market for access, infrastructure and connectivity. The interviewed companies indicated their willingness to beta-test our prototype in an industrial setting following the successful completion of this I2I phase I, with a view to becoming an early adopter.