Composable Heterogeneous Computing Systems

随着计算机变得更加强大，革命性的技术(如视频通话、人工智能)被实现。然而，由于能源限制，使用通用处理器无法实现实现新的颠覆性技术(如精确天气、基因组学和材料科学建模)所需的更高计算能力。相反，异构域特定体系结构(DSA)可以提供所需的高性能计算；但设计空间巨大且复杂，特别是在芯片制造技术从2D平面设计转向新兴的3D芯片堆叠解决方案的情况下。我们建议为异类系统开发一个开源、可扩展、灵活的实验框架，允许设计人员对新的计算体系结构、运行时服务和编程模型进行评估和推理。目前还不存在这样的框架，但研究人员必须充分利用在现代技术上实施的数字安全协议的潜力。在新兴应用程序的推动下，该程序位于新型编译技术和现代制造技术支持的先进计算平台的交叉点上。建议的多应用程序工作负载的异质计算框架是实现这些复杂的异质系统设计的关键第一步，并提供必要的抽象，使其可由非专家编程。它需要3个组件：编译流程、运行时支持和硬件模型(S)。编译流程需要为各个任务标识多个映射，以改进计算资源(CRS)的运行时共享。当异类计算平台(HCP)包括可重新配置的硬件(例如，FPGA)时，它还需要确定潜在的定制指令和硬件加速器，以及如何使用和共享它们来提高整个应用程序工作负载的性能和能耗。需要运行时服务(例如操作系统)来调度任务并在运行时利用工作负载CR共享。最后，HCP的设计复杂性使得通过实验验证正确性变得极其困难。能够用来保证硬件平台及其执行的软件的正确性的硬件模型对于确保正确的操作和研究结果的有效性至关重要。这三个部分提出了许多问题和挑战，构成了共同实现这一总干事今后五年目标的基础。结合Shannon博士指导和资助学生进入未来职业生涯的模式和流程，同时确保公平、多样化和包容性的培训环境，该计划以及由此产生的框架将产生HQP，其软件和硬件技能的组合将对开发下一代计算机系统的公司以及需要高端计算解决方案的应用领域(如生物医学和环境技术、国防等)具有重要价值。

As computers become more powerful, revolutionary technologies (eg Video-calling, Artificial Intelligence) are realized. However, the increased computing capacity needed to enable new disruptive technologies (eg accurate weather, genomics and materials science modelling) is not attainable using general-purpose processors due to energy constraints. Instead, heterogeneous Domain-Specific Architectures (DSAs) can provide the needed high-performance computing; but the design space is huge and complex, especially as chip fabrication technologies are moving from 2D planar designs to emerging 3D die-stacking solutions. We propose to develop an open-source, extensible, flexible experimental framework for heterogeneous systems that will allow designers to evaluate and reason about new compute architectures, runtime services and programming models. No such framework exists today, but it is essential for researchers to harness the full potential of DSAs implemented on modern technologies. Motivated by emerging applications, this program lies at the intersection of novel compilation technologies and advanced computing platforms enabled by modern fabrication technology. The proposed heterogeneous compute framework for multi-application workloads is a key first step to enable the design of these complex heterogeneous systems and provide the necessary abstractions to make them programmable by non-experts. It requires 3 components: a compilation flow, runtime support, and hardware model(s). The compilation flow needs to identify multiple mappings for individual tasks to improve runtime sharing of computing resources (CRs). When the Heterogeneous Compute Platform (HCP) includes reconfigurable hardware (e.g. an FPGA), it also needs to identify potential custom instructions and Hardware Accelerators and how they might be used and shared to improve performance and energy consumption across the application workload. Runtime services (eg an OS) are needed to schedule tasks and exploit workload CR sharing at runtime. Finally, the HCP's design complexity makes it extremely difficult to validate correctness experimentally. Hardware models that can be used to guarantee correctness of both the hardware platform and the software it executes are crucial to ensure correct operations and the validity of research results. These three components present numerous questions and challenges and form the foundation to collectively realize this DG's objective in the next five years. Combined with Dr. Shannon's pattern and process of mentoring and sponsoring her students into their future careers while ensuring and equitable, diverse and inclusive training environment, this program with the resulting framework will result in HQP with a combination of software and hardware skills that will be valuable to companies that develop next-generation compute systems and in application areas that require high-end compute solutions (e.g. biomedical and environmental technologies, defense, etc.).