Functional VLSI Module-based Multiprocessor Architectures for Real-time Vision

用于实时视觉的基于功能性 VLSI 模块的多处理器架构

• 批准号: 8912767
• 负责人: Dharma Agrawal
• 金额: $ 17.22万
• 依托单位: North Carolina State University
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 1989
• 资助国家: 美国
• 起止时间: 1989-07-15 至 1992-12-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=8912767&HistoricalAwards=false
• 关键词: Functional; VLSI; Module; based; Multiprocessor

This project focuses on system integration of VLSI functional modules by creating uniformity in their interface behavior. Such integration is aimed at designing flexible, real-time, low-level vision systems using pipelining of modules that correspond to individual operations. Two tasks are addressed in this research. First, functional modules for benchmarking vision operations are designed and characterized. Emphasis is placed on maintaining invariance in control and input/output requirements with respect to changes in the parameters of each operation. Second, algorithms and associated software for static mapping of a given sequence of operations on a set of functional modules connected through a network of switching nodes are developed. These algorithms balance the workload of the modules in order to achieve high throughput. The characterization of individual VLSI modules in terms of operation-specific input/output, buffer sizes, and memory size allows more realistic prediction of system performance. Multiprocessor architectures for vision can be classified as homogeneous architectures and heterogeneous architectures. In homogeneous architectures, exploiting parallelism optimally for the diversified operations in vision is very difficult, while in heterogeneous architectures, only a small set of low-level operations, relevant to the particular vision applications at hand, are implemented. This research addresses the important problem of developing functional modules and their integration in order to dynamically tailor vision operations to the computer architecture at run time. Success in this research allows better exploitation of parallelism for both low-level and high-level vision operations.

该项目的重点是通过创建接口行为的一致性来实现 VLSI 功能模块的系统集成。 这种集成的目的是使用与各个操作相对应的模块流水线来设计灵活、实时、低级的视觉系统。 本研究解决了两项任务。 首先，设计并表征了用于基准视觉操作的功能模块。 重点在于保持控制和输入/输出要求相对于每个操作的参数变化的不变性。 其次，开发了用于将给定操作序列静态映射到通过交换节点网络连接的一组功能模块上的算法和相关软件。 这些算法平衡模块的工作负载以实现高吞吐量。 根据操作特定的输入/输出、缓冲区大小和内存大小来表征各个 VLSI 模块，可以更真实地预测系统性能。 视觉多处理器架构可以分为同构架构和异构架构。 在同构架构中，针对视觉多样化操作最佳地利用并行性是非常困难的，而在异构架构中，仅实现与当前特定视觉应用​​相关的一小组低级操作。 这项研究解决了开发功能模块及其集成的重要问题，以便在运行时根据计算机架构动态定制视觉操作。 这项研究的成功可以更好地利用低级和高级视觉操作的并行性。