"Structural and Performance Limitations of Ultra-Submicron Gate-length Modulation-Doped FET's Based on InP Substrate for MM-Wave Amplification"

“用于毫米波放大的基于 InP 衬底的超亚微米栅极长度调制掺杂 FET 的结构和性能限制”

• 批准号: 8921694
• 负责人: Mukunda Das
• 金额: $ 20万
• 依托单位: Pennsylvania State Univ University Park
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 1990
• 资助国家: 美国
• 起止时间: 1990-07-15 至 1992-12-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=8921694&HistoricalAwards=false
• 关键词: Structural; Performance; Limitations; Ultra; Submicron

This research proposal is concerned with the design, realization, and characterization of 100 nm and 150 nm gate-length modulation doped field-effect transistors (MODFET's) based on lattice mateched A1InAs/InGaAs heterostructure on InP substrate, and intended for low- noise and high-gain signal amplification above 100GHz. The research efforts at Penn State will involve device structural design and Electrical characterization of the completed test device. The task of device fabrication will be undertaken by G.E. electronics Laboratory, Syracuse, NY, and the test samples will be made available to the PI for studies at no additional cost to NSF. The research will examine the electronic transport properties of the lattice matched and pseudomorphic InGaAs, and the Schottky barrier and buffer layer isolation quality of the A1InAs heterostructure layers in the MODFET structure. The characterization efforts will be organized in four different task areas involving d.c., small-signal, noise, and s-parameter measurements. These task areas will examine the key issues of device I-V and thermal stability, leakage current, breakdownvoltage, carrier concentration and mobility, parasitic equivalent network elements, low frequency 1/f type and g-r noise sources, HF intrinsic device noise sources, and extraction of the fundamental transit delay and charging time constant associated with the velocity saturated carrier transport in MODFET's. The proposed device structure is expected to provide low-noise (1dB) and high gain (8dB) amplification at 100 GHz satisfying the future DoD and NSA communication and radar system requirements.

本研究方案涉及到系统的设计、实现和 100 nm和150 nm栅长调制掺杂的表征 基于晶格匹配的场效应晶体管 在InP衬底上的A1 InAs/InGaAs异质结构，并用于低- 噪声和100 GHz以上的高增益信号放大。 研究 宾夕法尼亚州立大学的努力将涉及设备结构设计， 完成的试验器械的电气表征。 的任务 设备制造将由GE公司承担。电子实验室， 锡拉丘兹，NY，并将试验样本提供给PI 在没有额外费用的研究，以国家科学基金会。 这项研究将检查电子输运性质的 晶格匹配和赝晶InGaAs，以及肖特基势垒和 缓冲层隔离质量的A1 InAs异质结构层， MODFET结构。 将组织定性工作， 在涉及华盛顿的四个不同的任务领域，小信号、噪声和 S参数测量 这些任务领域将检查关键 器件I-V和热稳定性问题，漏电流， 击穿电压、载流子浓度和迁移率、寄生 等效网络元件、低频1/f型和G-R噪声 源，高频固有器件噪声源，并提取 基本的传输延迟和充电时间常数， MODFET中的速度饱和载流子输运。 拟议 器件结构有望提供低噪声（1dB）和高增益 (8dB)满足未来国防部和国家安全局要求的100 GHz放大率 通信和雷达系统要求。