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Exploiting Defect Clustering Information in VLSI Testing

Exploiting Defect Clustering Information in VLSI Testing
在 VLSI 测试中利用缺陷聚类信息
批准号:
9208929
负责人:
Adit Singh
金额:
$14.01万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
1992
资助国家:
美国
项目状态:
已结题
起止时间:
1992-10-01 至 1996-03-31

项目摘要

项目成果

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中文摘要
翻译
该项目正在研究如何使用有关晶片上缺陷聚集的信息,根据相邻芯片的测试结果对单个芯片进行成品率预测。假设晶片上的缺陷是聚集的,因此大多数好的芯片靠近其他好的芯片,而大多数有缺陷的芯片靠近其他芯片。然后,集群信息可用于针对晶片上的单个管芯进行特定测试。使用已发表文献中的晶片缺陷分布数据进行模拟,以评估该方法的可行性。正在开发准确的模型来预测可达到的缺陷水平,并正在确定在晶片上测试芯片的策略。
英文摘要
This project is investigating the use of information about defect clustering on wafers to make yield predictions for individual dies based on test results for neighboring dies. The hypothesis is that defects on a wafer are clustered, thus most good dies are close to other good ones and most defective dies are close to others. Clustering information can then be used for targeting particular tests to individual dies on the wafer. Simulations using wafer defect distribution data from the published literature is being employed to assess the viability of the approach. Accurate models to predict defect levels attainable are being developed and strategies for testing dies on the wafer are being determined.
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  • 批准号:
    2331003
  • 项目类别:
    Standard Grant
  • 资助金额:
    $30.0万
  • 财政年份:
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  • 依托单位:
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  • 项目类别:
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  • 资助金额:
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  • 财政年份:
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SHF: Small: Targeting Hazard Activated Faults to Improve Open Defect Coverage of Scan Delay Tests
  • 批准号:
    1527049
  • 项目类别:
    Standard Grant
  • 资助金额:
    $44.98万
  • 财政年份:
    2015
  • 负责人:
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  • 依托单位:
COLLABORATIVE RESEARCH: TIMING VARIATION RESILIENT SIGNAL PROCESSING: HARDWARE-ASSISTED CROSS-LAYER ADAPTATION
  • 批准号:
    1319529
  • 项目类别:
    Standard Grant
  • 资助金额:
    $20.5万
  • 财政年份:
    2013
  • 负责人:
    Adit Singh
  • 依托单位:
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