Career: Si-Based Alloys an Heterostructures for Improved Performance

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9624160 Berger This research project will examine and develop the Group IV alloy system (Si, Ge, C and Sn) studying material properties, fabrication techniques and electronic and photonic devices unique to the Si1-x-y-zGexCySnz system. Special attention will be focused on Si1-x-yGexCx alloys due to their inherent lattice matching ability to Si substrates, but not be limited to these alloys. Vegard's law predicts that an 8.2 to 1 ratio of Ge to C will be lattice matched to Si substrates. Among the benefits gained would be development of high performance Si-compatible heterostructure electronics as well as Si-based alloys and heterostructures with enhanced optical properties. The project commences with development of material issues related to these alloys by probing their optical, electronic and structural properties. Concurrently, the project will develop processing techniques such as etching and metalization, which could be unique to this material system. Optimized fabrication techniques will be applied to manufacture electronic and optoelectronic devices and circuits. High performance electronic devices such as heterojunction bipolar transistors (HBT) and modulation-doped field effect transistors (MODFET) would be ideally suited to the bandgap engineering possible with development of lattice matched heterstructure on Si substrates. Devices with enhanced photonic properties such as optical detectors and emitters will also be a primary focus. In addition to the research plan outlined above, and educational plan will involve four main thrusts. These four goals will be: 1. to attract women, under-represented minorities and persons with disabilities to get involved in research at the undergraduate level in order to promote future teachers from these groups; 2. to strengthen the undergraduate curriculum on semiconductor materials and devices by building lab demonstrations and competitive lab resources for the undergraduate teaching lab; 3. to develop a new M aster's degree in Electrical Engineering on Interconnect Technology; 4. to build a support structure for the retention engineering majors. ***