Si-Based Tunnel Diode Integration with CMOS and SiGe HBTs
Si-Based Tunnel Diode Integration with CMOS and SiGe HBTs
批准号:
0080760
负责人:
Paul Berger
金额:
$24.0万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2000
资助国家:
美国
项目状态:
已结题
起止时间:
2000-09-01 至 2000-12-31
中文摘要
点击翻译按钮获取中文摘要
英文摘要
The goal of this project is to integrate Si-based tunnel diodes with CMOS and SiGe HBTtechnology to demonstrate circuits which exhibit higher circuit speed, reducedcomponent count, and lowered power consumption, and which extend CMOS on theSemiconductor Industry Association (SIA) Roadmap without a linewidth reduction.The proposed project would establish an integrated program by involving universities(Delaware and Rochester Institute of Technology) and government research laboratories(Naval Research Laboratory) with the goal of making the first Si-based tunnel diodeintegrated circuit. The research will focus on simple tunnel diode circuits which combineSi-based tunnel diodes with CMOS and SiGe HBT technology. The work will besynergistic with another project (NSF-ITR) involving Michigan, Delaware, NRL and RITwhich proposes to study the new circuits enabled by this technology.This proposed project focuses upon developing integration recipes with CMOS andHBTs. This body of work includes: studying the back-end thermal budget forunmetalized CMOS to withstand tunnel diode processing; finding appropriate cleaningetchants which prepare the surface for MBE overgrowth while being benign to the pre-existingCMOS; develop selective etchants to remove unwanted poly-crystalline MBEgrowth atop the CMOS; perform MBE overgrowth into pre-defined windows atopsource/drain implants; examine possible emitter/base junction displacement with tunneldiode overgrowth; develop selective etchants to mesa etch the TD atop the HBTstructure; and realize some simple tunnel diode transistor circuits. The Si-based tunneldiodes have already been developed (NSF CAREER- Berger, DARPA- UltraElectronics) and are currently being optimized (NSF GOALI-Berger, NRL andRaytheon). SiGe HBT integration will be performed by Delaware and by the NRL team,who have considerable experience in the growth and fabrication of SiGe HBTs. For thisproposed project, Dr. Phillip Thompson at NRL will perform the MBE growths,Delaware will perform tunnel diode and SiGe HBT fabrication and testing, and RIT willperform the CMOS fabrication.Strong interaction between the University of Delaware, the Naval Research Laboratoryand Rochester Institute of Technology will foster open discussion and dialogue. Thisproposal seeks to bring together circuit designers, semiconductor device engineers andCMOS technologists for the sole purpose of realizing tunnel diode/transistor circuits on aSi platform. Undergraduate research and student training will play a significant role atDelaware through existing and anticipated NSF REU supplements and at RIT throughtheir student-run CMOS factory and RIT's senior thesis projects. RIT's budget includesan undergraduate researcher. The cross-disciplinary work and site visits to NRL researchlabs will enhance the educational process.
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