Si-Based Tunnel Diode Integration with CMOS and SiGe HBTs

该项目的目标是将硅基隧道二极管与CMOS和SiGe HBT技术进行集成，以展示具有更高的电路速度、减少元件数量和降低功耗的电路，并在不减少线宽的情况下将CMOS扩展到半导体工业协会(SIA)的路线图上。该项目将建立一个由大学(特拉华州和罗切斯特理工学院)和政府研究实验室(海军研究实验室)参与的综合计划，目标是制造第一个硅基隧道二极管集成电路。研究将重点放在简单的隧道二极管电路上，该电路将硅基隧道二极管与CMOS和SiGe HBT技术相结合。这项工作将与另一个项目(NSF-ITR)相一致，该项目涉及密歇根州、特拉华州、NRL和RIT，该项目建议研究由该技术实现的新电路。这个拟议的项目专注于开发与CMOS和HBT的集成配方。这项工作包括：研究非金属化CMOS的后端热预算，以经受住隧道二极管工艺；找到合适的清洗腐蚀剂，以便在对已有的CMOS有利的同时，为MBE过度生长做表面准备；开发选择性腐蚀剂，以去除CMOS上不需要的多晶MBE生长；在源极/漏极注入物的预定义窗口中进行MBE过度生长；检查可能的发射极/基区结位移与隧道二极管的过度生长；开发选择性腐蚀剂，以台面刻蚀HBT结构顶部的TD；以及实现一些简单的隧道二极管晶体管电路。硅基隧道二极管已经开发出来(NSF Career-Berger，DARPA-UltraElectronics)，目前正在优化(NSF Goali-Berger，NRL和Raytheon)。SiGe HBT集成将由特拉华州和NRL团队进行，他们在SiGe HBT的生长和制造方面拥有丰富的经验。在这个拟议的项目中，NRL的Phillip Thompson博士将进行MBE生长，特拉华州将进行隧道二极管和SiGe HBT制造和测试，RIT将进行CMOS制造。特拉华大学、海军研究实验室和罗切斯特理工学院之间的密切互动将促进公开讨论和对话。该方案旨在将电路设计师、半导体器件工程师和CMOS工艺专家聚集在一起，唯一的目的是在ASI平台上实现隧道二极管/晶体管电路。本科生研究和学生培训将通过现有和预期的NSF REU补充材料在特拉华州发挥重要作用，并通过学生运营的CMOS工厂和RIT的高级论文项目在RIT发挥重要作用。RIT的预算包括一名本科生研究员。跨学科的工作和对NRL研究实验室的实地访问将促进教育进程。

The goal of this project is to integrate Si-based tunnel diodes with CMOS and SiGe HBTtechnology to demonstrate circuits which exhibit higher circuit speed, reducedcomponent count, and lowered power consumption, and which extend CMOS on theSemiconductor Industry Association (SIA) Roadmap without a linewidth reduction.The proposed project would establish an integrated program by involving universities(Delaware and Rochester Institute of Technology) and government research laboratories(Naval Research Laboratory) with the goal of making the first Si-based tunnel diodeintegrated circuit. The research will focus on simple tunnel diode circuits which combineSi-based tunnel diodes with CMOS and SiGe HBT technology. The work will besynergistic with another project (NSF-ITR) involving Michigan, Delaware, NRL and RITwhich proposes to study the new circuits enabled by this technology.This proposed project focuses upon developing integration recipes with CMOS andHBTs. This body of work includes: studying the back-end thermal budget forunmetalized CMOS to withstand tunnel diode processing; finding appropriate cleaningetchants which prepare the surface for MBE overgrowth while being benign to the pre-existingCMOS; develop selective etchants to remove unwanted poly-crystalline MBEgrowth atop the CMOS; perform MBE overgrowth into pre-defined windows atopsource/drain implants; examine possible emitter/base junction displacement with tunneldiode overgrowth; develop selective etchants to mesa etch the TD atop the HBTstructure; and realize some simple tunnel diode transistor circuits. The Si-based tunneldiodes have already been developed (NSF CAREER- Berger, DARPA- UltraElectronics) and are currently being optimized (NSF GOALI-Berger, NRL andRaytheon). SiGe HBT integration will be performed by Delaware and by the NRL team,who have considerable experience in the growth and fabrication of SiGe HBTs. For thisproposed project, Dr. Phillip Thompson at NRL will perform the MBE growths,Delaware will perform tunnel diode and SiGe HBT fabrication and testing, and RIT willperform the CMOS fabrication.Strong interaction between the University of Delaware, the Naval Research Laboratoryand Rochester Institute of Technology will foster open discussion and dialogue. Thisproposal seeks to bring together circuit designers, semiconductor device engineers andCMOS technologists for the sole purpose of realizing tunnel diode/transistor circuits on aSi platform. Undergraduate research and student training will play a significant role atDelaware through existing and anticipated NSF REU supplements and at RIT throughtheir student-run CMOS factory and RIT's senior thesis projects. RIT's budget includesan undergraduate researcher. The cross-disciplinary work and site visits to NRL researchlabs will enhance the educational process.