Algorithms for Synthesis and Layout of Analog Intellectual Property

模拟知识产权综合与布局算法

• 批准号: 9901164
• 负责人: Rob Rutenbar
• 金额: $ 39.1万
• 依托单位: Carnegie-Mellon University
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 1999
• 资助国家: 美国
• 起止时间: 1999-09-01 至 2004-08-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=9901164&HistoricalAwards=false
• 关键词: Algorithms; Synthesis; Layout; Analog; Intellectual

Advances in IC fabrication technology make possible complete electronicsystems on a single chip. Many such systems-on-a-chip require both digitaland analog computation. The analog subsystems interface to the continuous,external world: wireless links, wired networks, sensors, transducers.Electronic design automation technology for the digital subsystems isrelatively robust; automation for the analog subsystems is still primitive.This project is developing design automation methods for synthesis andlayout of critical analog circuit blocks. The approach focuses on novelnumerical and combinatorial optimization algorithms that can efficientlysearch over many circuit solution candidates. The goal is to be able toarchive synthesizable descriptions of circuits as analog "intellectualproperty", thus allowing them to be reused and retargeted in newapplications

IC制造技术的进步使单个芯片上的完整电子系统成为可能。芯片上的许多这样的系统都需要数字和模拟计算。与连续外部世界的模拟子系统接口：无线链接，有线网络，传感器，传感器。数字子系统的电信设计自动化技术定义强大；模拟子系统的自动化仍然是原始的。该项目正在开发设计自动化方法，用于综合临界模拟电路块。 该方法着重于可以有效搜索许多候选电路解决方案的新颖数字和组合优化算法。目的是能够将电路的定量合成描述作为模拟“智能杂志”，从而使它们可以重复使用并重新定位在newapplications中