Algorithms for Synthesis and Layout of Analog Intellectual Property

模拟知识产权综合与布局算法

• 批准号: 9901164
• 负责人: Rob Rutenbar
• 金额: $ 39.1万
• 依托单位: Carnegie-Mellon University
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 1999
• 资助国家: 美国
• 起止时间: 1999-09-01 至 2004-08-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=9901164&HistoricalAwards=false
• 关键词: Algorithms; Synthesis; Layout; Analog; Intellectual

Advances in IC fabrication technology make possible complete electronicsystems on a single chip. Many such systems-on-a-chip require both digitaland analog computation. The analog subsystems interface to the continuous,external world: wireless links, wired networks, sensors, transducers.Electronic design automation technology for the digital subsystems isrelatively robust; automation for the analog subsystems is still primitive.This project is developing design automation methods for synthesis andlayout of critical analog circuit blocks. The approach focuses on novelnumerical and combinatorial optimization algorithms that can efficientlysearch over many circuit solution candidates. The goal is to be able toarchive synthesizable descriptions of circuits as analog "intellectualproperty", thus allowing them to be reused and retargeted in newapplications

集成电路制造技术的进步使得在单个芯片上实现完整的电子系统成为可能。许多这样的单片系统既需要数字计算，也需要模拟计算。模拟子系统连接到连续的外部世界：无线链路、有线网络、传感器、传感器。数字子系统的电子设计自动化技术相对稳健；模拟子系统的自动化仍然是原始的。该项目旨在开发关键模拟电路模块的合成和布局的设计自动化方法。该方法侧重于新颖的数值和组合优化算法，可以有效地搜索许多电路解候选。目标是能够将电路的可合成描述存档为模拟“知识产权”，从而允许它们在新应用中被重用和重新定位