CAREER: Semantic Decomposition of Instruction Sets

研究的重点是揭示现代超标量微处理器并发性和提高性能的新方法。这些方法包括指令集的语义分解和数据路径的位片分解，以公开处理器控制和数据路径的元素，从而允许对可用的微体系结构特性的至少一个子集进行灵活的可编程控制。初步分析表明，有很大的机会可以减少ALU周期时间、功耗和线延迟的有害影响，而对以每个周期的指令测量的吞吐量几乎没有有害影响。此外，该研究建议使用部分操作数知识进行预执行，以解决条件分支，识别错过缓存的引用，并减轻其他有问题指令的影响。拟议教育计划的主要目标是将高级主题整合到威斯康星大学研究生和本科生的计算机体系结构课程中；继续让本科生参与研究，透过接触前沿研究课题，提升他们的教育经验；将先进的教学技术融入课堂环境，以适应各种学习方式；并利用新兴的网络技术简化教师和学生之间的互动和离线交流。

The research focuses on new approaches for exposing concurrency and improving performance in modernsuperscalar microprocessors. These approaches include semantic decomposition of instruction sets and bitslice decomposition of data paths to expose elements of the processor's control and data path to allow flexible, programmable control over at least a subset of the microarchitectural features that are available. Preliminary analysis shows that there are significant opportunities for reducing ALU cycle time, power consumption, and the deleterious effects of wire delay with little or no harmful effects on throughput measured in instructions per cycle. Further, the research proposes pre-execution using partial operand knowledge to resolve conditional branches, identify references that miss the cache, and mitigate the effects of other problematic instructions.The primary objectives of the proposed educational plan are to integrate advanced topics into the University of Wisconsin's computer architecture curriculum at the graduate and undergraduate level; to continue to involve undergraduate students in research to enhance their educational experience via exposure to leading-edge research topics; to incorporate advanced pedagogic techniques into the classroom environment in order to accommodate all learning styles; and to exploit emerging web-based technologies to streamline interactive and off-line communication between instructor and students.