CAREER: Semantic Decomposition of Instruction Sets

研究的重点是在现代超标量微处理器中暴露并发性和提高性能的新方法。 这些方法包括指令集的语义分解和数据路径的位片分解，以暴露处理器的控制和数据路径的元素，从而允许对可用的微架构特征的至少一个子集进行灵活的可编程控制。 初步分析表明，有显着的机会，减少ALU的周期时间，功耗，和线延迟的有害影响，很少或没有有害影响的吞吐量测量在每个周期的指令。 此外，该研究提出了预执行使用部分操作数的知识，以解决条件分支，确定引用，错过该高速缓存，并减轻其他有问题的instruction.The主要目标的建议教育计划是整合先进的主题到威斯康星州的计算机体系结构课程的研究生和本科生水平;继续让本科生参与研究，通过接触前沿研究课题来增强他们的教育经验;将先进的教学技术纳入课堂环境，以适应所有学习方式;并利用新兴的基于网络的技术来简化教师和学生之间的交互式和离线通信。

The research focuses on new approaches for exposing concurrency and improving performance in modernsuperscalar microprocessors. These approaches include semantic decomposition of instruction sets and bitslice decomposition of data paths to expose elements of the processor's control and data path to allow flexible, programmable control over at least a subset of the microarchitectural features that are available. Preliminary analysis shows that there are significant opportunities for reducing ALU cycle time, power consumption, and the deleterious effects of wire delay with little or no harmful effects on throughput measured in instructions per cycle. Further, the research proposes pre-execution using partial operand knowledge to resolve conditional branches, identify references that miss the cache, and mitigate the effects of other problematic instructions.The primary objectives of the proposed educational plan are to integrate advanced topics into the University of Wisconsin's computer architecture curriculum at the graduate and undergraduate level; to continue to involve undergraduate students in research to enhance their educational experience via exposure to leading-edge research topics; to incorporate advanced pedagogic techniques into the classroom environment in order to accommodate all learning styles; and to exploit emerging web-based technologies to streamline interactive and off-line communication between instructor and students.