I-Corps: Customizable and scalable high-performance microprocessor

这个i-Corps项目的更广泛的影响/商业潜力是为对成本敏感的嵌入式处理器实现卓越的性能和能效。随着计算设备变得无处不在并渗透到生活的方方面面，对更高性能的需求也随之而来。然而，实现高性能微处理器的传统设计技术会产生资源成本，并且通常会受到能源效率低下的影响。由于大多数嵌入式设计都受能源限制且对成本高度敏感，因此这些管理费用会带来相当大的成本。由于传统技术的无效，这些相互竞争的设计限制的副产品一直停滞不前。通过使用该项目的新型处理器微体系结构，商业设计应该可以在不产生资源开销的情况下，将能效提高约30%，并实现卓越的性能。网络和存储领域等应用是采用该设计的初步候选。这个i-Corps项目专注于通过使用新型处理器微体系结构来创建节能微控制器。在开发最基本的微处理器技术的时候，电力不是问题，晶体管也很稀缺。为了满足这些限制，设计的重点是最大化利用现有的少数执行资源。随着晶体管变得更加丰富和性能变得更加重要，设计利用这些额外的晶体管来实现复杂的组织和调度技术，以最大限度地利用稀缺的执行资源。该项目的体系结构通过将额外的晶体管分配给执行资源并极大地简化组织和调度管理费用，扭转了这一趋势。初步研究表明，与目前的商业设计相比，在保持高水平性能的同时，有可能获得相当大的能源和面积效率收益。此外，这种微处理器的新颖结构使许多优化成为可能，而这些优化在传统设计中是不现实的，因为它们的组织和调度复杂。

The broader impact/commercial potential of this I-Corps project is to enable superior performance and energy efficiency for cost-sensitive embedded processors. As computing devices have become ubiquitous and permeated every aspect of life, the need for greater performance has also followed. However, traditional design techniques to enable high performance microprocessors incur resource costs and typically suffer from poor energy efficiency. These overheads come at a considerable cost as most embedded designs are energy constrained and highly cost sensitive. The byproduct of these competing design constraints has been stagnating progress due to the ineffectiveness of traditional techniques. Through the use of this project's novel processor microarchitecture, commercial designs should observe approximately 30% greater energy efficiency and superior performance without incurring resource overhead. Applications such as networking and storage domains are initial candidates for adopting the design.This I-Corps project focuses on the creation of an energy-efficient microcontroller through the use of a novel processor microarchitecture. At the time most fundamental microprocessor techniques were developed, power was not a problem and transistors were scarce. To satisfy these constraints, designs focused on maximizing utilization of the few execution resources present. As transistors became more plentiful and performance of greater importance, designs utilized these additional transistors to enable complex organizational and scheduling techniques to maximize the operation of the scarce execution resources. This project's architecture reverses this trend by allocating additional transistors to execution resources and greatly simplifying organizational and scheduling overheads. Initial research suggests that considerable energy and area efficiency gains are possible while maintaining a high level of performance in comparison to current commercial designs. Additionally, the novel structure of this microprocessor enables many optimizations that are impractical in conventional designs due to their complex organization and scheduling.