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Design of High-Speed DSPTransceivers for Ethernet over Copper

Design of High-Speed DSPTransceivers for Ethernet over Copper
铜缆以太网高速 DSP 收发器的设计
批准号:
0429979
负责人:
Keshab Parhi
金额:
$25.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2004
资助国家:
美国
项目状态:
已结题
起止时间:
2004-09-01 至 2007-08-31

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中文摘要
翻译
提案编号:0429979参考:明尼苏达大学双城分校PRINCIPAL调查员:Parhi,KeshabTITLE:为铜缆上的以太网设计高速DSP收发器摘要:服务器速度应始终比桌面速度高一个数量级。在台式机和笔记本电脑上越来越多地使用千兆位以太网,要求数据中心的铜缆上有10千兆位的可用性。这些公司必须利用现有或新的铜缆,而且必须比基于光纤的竞争对手便宜。该项目将解决10千兆位每秒铜缆以太网收发机的数字信号处理组件的体系结构设计方面和VLSI实现方面。设计这些系统的挑战很多。在系统层面上,要达到所需的速度,波特率和调制方案应该是什么?应该在发送端使用预编码,还是在接收端使用均衡?应该使用低密度奇偶校验码吗?如何以更低的功耗实现基于7000抽头的接收器,这是消除电缆近端串扰和回声所必需的?哪些接收器架构更适合满足速度要求?以每秒10千兆位的速度实现低密度奇偶校验码的最佳解决方案是什么?我们将寻求这些问题的答案。新的调制方案将通过硬件协同设计技术进行研究,寻求面积和功耗最小的最佳系统结构。数据中心和台式机每秒10 GB数据的可用性将显著降低部署成本并提高互联网接入速度。
英文摘要
PROPOSAL NO: 0429979INSTITUTION: University of Minnesota-Twin CitiesPRINCIPAL INVESTIGATOR: Parhi, KeshabTITLE: Design of High-Speed DSPTransceivers for Ethernet over CopperAbstract:The server speed should always be an order of magnitude higher than the desktop speed. Growing use of gigabit ethernet on desktops and laptops requires availability of 10-gigabit over copper in data centers. These must exploit use of existing or new copper cables, and must be cheaper than their fiber based competitors. This project will address architectural design aspects and VLSI implementation aspects of the digital signal processing components of a 10-gigabit per second ethernet transceiver over copper. The challenges in design of these systems are many. At the system level, to achieve the required speed, what should be the baud rate and modulation scheme? Should one use precoding at the transmitter or equalization at the receiver? Should one use low-density parity check codes? How can one implement a 7000-tap based receiver, necessary for cancelling near end cross talk and echo for the cables, with lower power consumption? What receiver architectures are more suitable for meeting the speed requirements? What are the best solutions for implementing low-density parity check codes at 10 gigabits per second? Answers to these questions will be sought. Novel modulation schemes will be studied by hardware codesign techniques and the best architecture of a system with least area and power consumption will be sought. Availability of 10-gigabit per second data at data centers and desktops will significantly reduce the cost of deployment and increase the speed of internet access.
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