Design of High-Speed DSPTransceivers for Ethernet over Copper
Design of High-Speed DSPTransceivers for Ethernet over Copper
批准号:
0429979
负责人:
Keshab Parhi
金额:
$25.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2004
资助国家:
美国
项目状态:
已结题
起止时间:
2004-09-01 至 2007-08-31
中文摘要
项目编号:0429979机构:明尼苏达大学双城分校主要研究人员:Parhi, keshab标题:基于铜的以太网高速dsp收发器设计摘要:服务器速度应始终比桌面速度高一个数量级。在台式机和笔记本电脑上越来越多地使用千兆以太网,需要在数据中心提供10千兆铜线。它们必须利用现有的或新的铜缆,并且必须比基于光纤的竞争对手更便宜。该项目将解决每秒10千兆以太网铜收发器数字信号处理组件的架构设计和VLSI实现方面的问题。设计这些系统的挑战很多。在系统级,要达到所需的速度,波特率和调制方案应该是什么?应该在发送端使用预编码还是在接收端使用均衡?应该使用低密度奇偶校验码吗?如何以更低的功耗实现基于7000个抽头的接收器,以消除电缆的近端串扰和回声?什么样的接收器架构更适合满足速度要求?实现每秒10千兆比特的低密度奇偶校验码的最佳解决方案是什么?我们将寻求这些问题的答案。将利用硬件协同设计技术研究新的调制方案,并寻求最小面积和功耗的最佳系统架构。在数据中心和台式机上提供每秒10g的数据将显著降低部署成本并提高互联网访问速度。
英文摘要
PROPOSAL NO: 0429979INSTITUTION: University of Minnesota-Twin CitiesPRINCIPAL INVESTIGATOR: Parhi, KeshabTITLE: Design of High-Speed DSPTransceivers for Ethernet over CopperAbstract:The server speed should always be an order of magnitude higher than the desktop speed. Growing use of gigabit ethernet on desktops and laptops requires availability of 10-gigabit over copper in data centers. These must exploit use of existing or new copper cables, and must be cheaper than their fiber based competitors. This project will address architectural design aspects and VLSI implementation aspects of the digital signal processing components of a 10-gigabit per second ethernet transceiver over copper. The challenges in design of these systems are many. At the system level, to achieve the required speed, what should be the baud rate and modulation scheme? Should one use precoding at the transmitter or equalization at the receiver? Should one use low-density parity check codes? How can one implement a 7000-tap based receiver, necessary for cancelling near end cross talk and echo for the cables, with lower power consumption? What receiver architectures are more suitable for meeting the speed requirements? What are the best solutions for implementing low-density parity check codes at 10 gigabits per second? Answers to these questions will be sought. Novel modulation schemes will be studied by hardware codesign techniques and the best architecture of a system with least area and power consumption will be sought. Availability of 10-gigabit per second data at data centers and desktops will significantly reduce the cost of deployment and increase the speed of internet access.
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