Collaborative Research: Architectural Support for Security and Privacy Protection on Uni- and Multi- Processors

在广泛的互联网系统上运行的软件程序经常受到各种形式的恶意攻击。程序执行行为可能会被改变，从而造成重大损害，数据可能会损坏，隐私可能会受到极大损害。我们的目标是开发一个安全的处理器模型，在这个模型上可以很容易地构建安全的应用程序。所提出的设计可以通过多样化处理器所有者身份的表示来保护其隐私。为了实现我们的目标，我们将增强现有的微处理器架构，以纳入新的功能。提出的体系结构组件解决了对单处理器和多处理器体系结构的广泛攻击。特别是，我们将开发以下新技术。增强单处理器安全性的体系结构支持。这种微架构的机密性和完整性是通过对芯片上传输的代码和数据进行加密和解密来保持的。虽然pi和其他人已经成功地解决了加密的效率问题，但加密操作的计算密集型性质导致对入站流量的验证延迟。这种延迟带来了漏洞，因为在此期间可以在芯片上窥视关键数据。本项目设计了一个强大的验证引擎，可以防止片上数据的信息泄露，更广泛的影响完成提出的研究目标可以显著影响研究界，处理器行业和学术教育。本文提出的安全处理器模型是一个可靠的计算基础，可以在此基础上构建更高级别的安全系统。由于应用程序的加密方式不同，因此操作系统安全性与用户应用程序安全性是分开的。破坏操作系统并不一定会削弱用户的程序或数据。因此，更高级别的安全协议可以利用安全体系结构组件。本提案中提出的技术也非常实用。它们中的许多已经准备好被合成并集成到真正的处理器中。本建议的教育部分旨在使学生更好地为即将到来的计算机系统设计挑战做好准备。本提案所包含的研究项目为学生提供了在课堂项目、硕士或博士论文以及其他宝贵的实践经验方面的巨大机会。

Software programs executing on a broad range of internet systems are constantly subject to maliciousattacks in various forms. Program execution behavior might be altered as a result causing substantial damage, data may become corrupted and privacy can be greatly compromised.The objective is to develop a secure processor model which secure applications can easily be built on. The proposed designs can protect the privacy of the processor owner through diversifying the representation of its identity.Intellectual MeritTo achieve our goals, we will augment the existing microprocessor architecture to incorporate new features. The proposed architectural components address a broad range of attacks on uniprocessor and multiprocessor architectures. In particular, we will develop novel techniques as follows. Architecture Support for Enhancing Uniprocessor Security. The confidentiality and integrity of such a microarchitecture are maintained through encryption and decryption of the code and data transferred across the chip.While the efficiency of encryption has been solved successfully by PIs and others, the computation intensive nature of crypto operations has led the verification of inbound traffic being delayed. Such delay imposes vulnerability as one can peek critical data on-chip during this time. This project designs a strong verification engine with which information leakage of on-chip data is prevented,Broader ImpactAccomplishing the proposed research objectives can significantly impact the research community, processor industry, and academic education. The secure processor model in this proposal is a reliable computing base on which higher levels of secure systems may be built. Since applications are encrypted differently, OS security and user application security are separated. Compromising the OS does not necessarily weaken the user program or data. Higher levels security protocols can thus take advantage of the secure architectural components. Techniques proposed in this proposal are also very practical. Many of them are ready to be synthesized and integrated into real processors.The education component in this proposal seeks to better prepare the students for the coming challenges in computer system design. The research projects included in this proposal offer the students great opportunities in terms of class projects, Master or Doctoral theses, and other valuable practical experience.