SHF: Small: Architectural Support for Reliable ReRAM Crossbar Memory

在处理极大数据量的主流应用程序的推动下，对大内存容量的需求变得越来越强烈。传统的基于DRAM的内存面临着严重的技术扩展限制，如工艺变化，这阻碍了以合理成本增长内存密度。这样的挑战激发了对替代存储技术的探索，例如新兴的非易失性电阻RAM(ReRAM)。ReRAM利用金属-氧化物-金属结构的电阻来表示存储的信息。与其他非易失性存储器相比，它具有更短的读写延迟和更好的写入耐久性。ReRAM显示出卓越的可扩展性，可设计为使用纵横制结构或3D堆叠构建高密度存储器。这些特性使ReRAM成为替代DRAM的一项具有竞争力的技术，可为现代数据密集型应用实现巨大的存储容量。将通过出版物、研究研讨会、教程、软件演示、参加会议和技术转让倡议，通过广泛传播成果来实现教育目标。本研究将对研究生、本科生，特别是代表性不足的学生进行持续的学生培训。使用纵横制ReRAM架构构建大容量存储器有很大的困难。存储器的可靠性受到其巨大的潜漏、操作干扰和耐用性的挑战。本研究旨在通过研究新的单元阵列组织和管理技术来应对这些挑战，以减少潜漏、最大限度地减少干扰、延长寿命和提高新存储结构的整体可靠性。这项研究将确保未来的阻性存储器能够在高密度下变得可靠，这有助于推动摩尔-S定律在记忆进步中的延续。

Driven by prevailing applications that process extreme volume of data, the quest for large memory capacity has become increasingly strong. Conventional DRAM-based memory is facing severe technology scaling limitations such as process variations, which hinders the growth in memory density at reasonable cost. Such challenges inspire the search for alternative memory technologies such as the emerging non-volatile Resistive RAMs (ReRAM). ReRAM exploits resistance of Metal-Oxide-Metal structure to represent stored information. It has shorter read and write latency, and better write endurance when compared with other non-volatile memories. ReRAM exhibits superior scalability and can be architected to build high-density memories using a crossbar structure, or 3D stacking. Such features make ReRAM a competitive technology as a DRAM replacement to achieve significant large memory capacity for modern data intensive applications. Education objectives will be achieved through broad dissemination of results via publications, research seminars, tutorials, software demonstrations, conference participation, and technology transfer initiatives. Continuous student training will be carried through involving graduate, undergraduate students, especially underrepresented students in this research. There are major difficulties in building a large memory using the crossbar ReRAM architecture. The reliability of the memory is challenged by its large sneak leakage, operation disturbance and endurance. This research aims to tackle those challenges by investigating novel cell-array organizations and management techniques to reduce sneak leakage, minimize disturbance, prolong the lifetime and improve the overall reliability of the new memory structure. This research will ensure that future resistive memories can be developed to become reliable at high density, which helps to fuel the continuation of Moore?s Law in memory advancement.