MRI: ACQUISITION OF AN ULTRA FAST pS RF-TLP TESTING SYSTEM FOR ADVANCED VDSM ULSI RESEARCH TO NANO SCALE

AbstractThe proposal requests funds to acquire and establish a Ultra-Fast pS RF-TLP Testing System Cluster for research on VDSM IC down to nano-scale，including advanced super-GHz RF/mixed signal IC and on-chip ESD（electrostatic discharge）protection circuitsdesign.Intellectual Merits：ESD failure becomes a major IC reliability problem as semiconductor technologies move into VDSM ULSI regime.片上ESD保护电路是保护IC芯片免受ESD损坏的必要条件，而超GHz射频IC的研究是未来无线通信的基础，射频IC的设计和特性是一个巨大的挑战。PI一直在进行由NSF和业界赞助的片上ESD保护和RF IC的开创性研究，主要有以下几个方面：1.研究三维混合模式ESD仿真方法。2.开发精确的大电流ESD器件模型。3.开发全芯片ESD保护设计验证CAD软件。4.探索100纳米以下ULSI IC的ESD保护解决方案。5.研究ESD现象和未来纳米级技术的保护。6.探索超GHz硅RF IC和新兴宽带隙GaN半导体的ESD保护。7.开发超小型射频系统芯片电感。开发超GHz超宽带（UWB）SoC。9.开发26 GHz单芯片RFID SoC。开发高性能ADC IC。先进的hi-f测试（1 ps）对此类研究至关重要。新的Super-GHz RF-TLP测试系统集群由4012型CDM VSTLP测试仪和11971 B型8”RF热晶圆探测站组成。更广泛的影响：这一新系统将显著增强IIT的研究和教学基础设施。将开发新的课程和实验室。计划将多样性纳入研究和教学。该设施将对跨学科研究活动和外部用户开放，以促进ESD保护和RF/混合信号IC的跨学科和大学与产业的合作。

AbstractThe proposal requests funds to acquire and establish an Ultra-Fast pS RF-TLP Testing System Cluster for research on VDSM ICs down to nano-scale, including advanced super-GHz RF/mixed-signal ICs and on-chip ESD (electrostatic discharge) protection circuitry designs.Intellectual Merits: ESD failure becomes a major IC reliability problem as semiconductor technologies move into VDSM ULSI regime. On-chip ESD protection circuitry is required to protect IC chips against ESD damage, while Super-GHz RF IC research is the foundation to future wireless communications where design and characterization of RF ICs is a big challenge. The PI has been conducting pioneering research on on-chip ESD protection and RF ICs sponsored by NSF and the industry, with several thrusts: 1. To investigate 3D mixed-mode ESD simulation approach. 2. To develop accurate high-current ESD device models. 3. To develop whole-chip ESD protection design verification CAD software. 4. To explore ESD protection solutions for sub-100nm ULSI ICs. 5. To investigate ESD phenomena and protection for future nano-scale technologies. 6. To explore ESD protection for super-GHz silicon RF ICs and emerging wide-bandgap GaN semiconductors. 7. To develop super-compact IC inductors for RF SoC. 8. To develop super-GHz ultra wideband (UWB) SoCs. 9. To develop 26GHz single-chip RFID SoC. 10. To develop high-performance ADC ICs. Advanced hi-f testing (1ps) is critical to such research. The new Super-GHz RF-TLP Testing System Cluster consists of a Model 4012 CDM VSTLP Tester and a Model 11971B 8" RF Thermal Wafer Probing Station.Broader Impacts: This new System will significantly enhance the research and teaching infrastructure at IIT. New courses and laboratories will be developed. Integrating diversity into research and teaching is planned. The facility will be open to inter-disciplinary research activities and external users to promote cross-disciplinary and university-industry collaboration on ESD protection and RF/mixed-signal ICs.