NANOWIRE CROSSBAR SWITCH ESD PROTECTION MECHANISM AND CIRCUIT

本研究的目的是开发非传统的静电放电（ESD）保护机制和结构，使用新的纳米线交叉阵列和纳米机械开关机制，纳米集成电路（IC）。该方法是研究新的纳米线开关ESD放电机制，制造和表征纳米交叉开关阵列，探索CMOS兼容的制造流程，并开发新的建模技术。因此，需要片上ESD保护来保护IC免受ESD损坏。ESD失效和保护涉及非常复杂的多重耦合效应。随着集成电路技术的不断缩小，ESD引起的泄漏和误触发效应在GHz的工作，其传统的晶体管型保护机制所固有的，变得无法容忍。因此，迫切需要开发新的ESD保护机制和结构。本计画旨在发展全新的奈米线交叉阵列及奈米机械开关ESD保护机制与结构，以取代传统的ESD保护机制，进而消除ESD所引发的漏电与误触发问题。更广泛的影响：该项目的成功将为下一代纳米级IC技术提供第一个纳米线交叉阵列和纳米机械开关ESD保护机制和结构。新的ESD保护解决方案对于最终解决纳米节点上巨大的IC可靠性挑战至关重要。NSF对这项研究的支持使拟议的国际学术界和产业界合作活动能够使美国学生、半导体行业、学术界和美国社会受益匪浅。

The objective of this research is to develop non-traditional Electrostatic Discharge (ESD) protection mechanisms and structures, using novel nanowire crossbar array and nano mechanical switch mechanisms, for nanoscale integrated circuits (IC). The approach is to investigate new nanowire switching ESD discharging mechanism, to fabricate and characterize nano crossbar switch arrays, to explore CMOS-compatible fabrication flow and to develop new modeling techniques.Intellectual Merits: ESD failure is the most devastating IC reliability problem in sub-100nm regime that causes the industry billions of dollars annually. On-chip ESD protection is hence required to protect ICs against ESD damage. ESD failure and protection involves very complex multi-coupling effects. As IC technologies continue to shrink, ESD-induced leakage and mis-triggering effect at GHz operation, inherent to its traditional transistor-type protection mechanism, become intolerable. It is hence imperative to develop novel ESD protection mechanisms and structures. This project is to develop completely new nanowire crossbar array and nano mechanical switch based ESD protection mechanisms and structures, which intends to replace the decade-long traditional ESD protection mechanism, therefore to eliminate the ESD-induced leakage and mis-triggering problems. Broader Impacts: Success of this project will deliver the first nanowire crossbar array and nano mechanical switch ESD protection mechanisms and structures for next generation IC technologies at nanoscale. The new ESD protection solutions are critical to finally resolving the grand IC reliability challenge at nano nodes. NSF support of this research enables the proposed international-academia-industry collaboration activities that greatly benefit American students, the semiconductor industry, the academia and the American society.