CAREER: Reconfigurable Memory for Efficient, Secure, Robust Digital Systems

现代数字系统的内存层次结构正迅速成为其性能、效率、可靠性和成本的主要决定因素。集成在片上系统和微处理器中的片上内存的数量已经显著增长，并且很可能在未来几代中主导芯片领域。计算机体系结构的趋势正在增加对存储系统提出需求的请求者的数量和类型，但集成电路制造和工艺扩展的趋势正在使设计和制造高效，健壮的存储器变得更加困难。为了应对这些趋势，本项目探索在电路、微架构和架构级别增加存储系统的可重构性，以提高设计的效率和稳健性。本文还探讨了可重构性如何通过模糊设计意图和使用定制内存系统实现高效加密来增强设计的安全性。在何种条件下，通过可重构性定制存储系统来提高应用程序的效率和安全性，将超过增加可重构性所带来的VLSI开销。此外，还将研究如何利用可重构性来提高数字集成电路的稳健性和良率，使存储器能够适应工艺、电压和温度变化，以及在制造时和部署后发生的掩膜故障。总而言之，该项目将产生针对高效、安全、健壮、通用计算系统的可重构内存解决方案，并了解整体可重构内存设计空间。

The memory hierarchy of modern digital systems is quickly becoming the preeminent determinant of their performance, efficiency, reliability, and cost. The amount of memory integrated on-die in systems-on-chip and microprocessors has grown significantly and will likely dominate the die area in future generations. Trends in computer architecture are increasing the number and type of requestors making demands on the memory system, yet trends in IC manufacturing and process scaling are making the design and manufacture of efficient, robust memories more difficult. To address these trends, this project explores adding reconfigurability to the memory system at the circuit, microarchitecture, and architecture levels to boost the efficiency and robustness of the design. It also explores how reconfigurability can also be used to enhance the security of the design by obscuring the design intention and enabling efficient encryption implementations with a customized memory system. The conditions under which the increase in efficiency and security from tailoring the memory system to the application via reconfigurability outweighs the VLSI overheads of adding that reconfigurability will be investigated. How reconfigurability can be used to increase the robustness and yield of digital ICs by allowing the memory to adapt to process, voltage, and temperature variations and mask faults occurring at manufacture-time and after deployment will also be investigated. In summary, this project should result in reconfigurable memory solutions targeted at efficient, secure, robust, general-purpose computing systems and an understanding of the overall reconfigurable memory design space.