CAREER: Reconfigurable Memory for Efficient, Secure, Robust Digital Systems

职业：可重构内存，实现高效、安全、稳健的数字系统

• 批准号: 0644161
• 负责人: Kenneth Mai
• 金额: $ 40万
• 依托单位: Carnegie-Mellon University
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2007
• 资助国家: 美国
• 起止时间: 2007-07-01 至 2012-06-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0644161&HistoricalAwards=false
• 关键词: CAREER; Reconfigurable; Memory; Efficient; Secure

The memory hierarchy of modern digital systems is quickly becoming the preeminent determinant of their performance, efficiency, reliability, and cost. The amount of memory integrated on-die in systems-on-chip and microprocessors has grown significantly and will likely dominate the die area in future generations. Trends in computer architecture are increasing the number and type of requestors making demands on the memory system, yet trends in IC manufacturing and process scaling are making the design and manufacture of efficient, robust memories more difficult. To address these trends, this project explores adding reconfigurability to the memory system at the circuit, microarchitecture, and architecture levels to boost the efficiency and robustness of the design. It also explores how reconfigurability can also be used to enhance the security of the design by obscuring the design intention and enabling efficient encryption implementations with a customized memory system. The conditions under which the increase in efficiency and security from tailoring the memory system to the application via reconfigurability outweighs the VLSI overheads of adding that reconfigurability will be investigated. How reconfigurability can be used to increase the robustness and yield of digital ICs by allowing the memory to adapt to process, voltage, and temperature variations and mask faults occurring at manufacture-time and after deployment will also be investigated. In summary, this project should result in reconfigurable memory solutions targeted at efficient, secure, robust, general-purpose computing systems and an understanding of the overall reconfigurable memory design space.

现代数字系统的存储器层次结构正迅速成为其性能、效率、可靠性和成本的主要决定因素。在片上系统和微处理器中集成在管芯上的存储器的量已经显著增长，并且在未来几代中可能主导管芯面积。计算机体系结构的趋势正在增加对存储器系统提出要求的请求者的数量和类型，而IC制造和工艺缩放的趋势正在使高效、鲁棒存储器的设计和制造更加困难。为了应对这些趋势，该项目探讨了在电路，微架构和架构级别上为存储器系统添加可重构性，以提高设计的效率和鲁棒性。它还探讨了如何可重构性也可以用来提高设计的安全性，通过模糊的设计意图，并使高效的加密实现与定制的内存系统。 在何种条件下，增加的效率和安全性，从剪裁的存储器系统的应用程序，通过可重构性超过了VLSI的开销，增加可重构性将被调查。还将研究如何利用可重构性，通过允许存储器适应工艺、电压和温度变化，以及屏蔽在部署时和部署后发生的故障，来提高数字IC的鲁棒性和产量。 总之，该项目应导致可重构存储器解决方案针对高效，安全，鲁棒，通用计算系统和整体可重构存储器设计空间的理解。