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FET: Medium: Memory Processing Unit (MPU) - An Efficient, Reconfigurable In-memory Computing Fabric

FET: Medium: Memory Processing Unit (MPU) - An Efficient, Reconfigurable In-memory Computing Fabric
FET:介质:内存处理单元 (MPU) - 高效、可重新配置的内存计算结构
批准号:
1900675
负责人:
Wei Lu
金额:
$95.26万
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
2019
资助国家:
美国
项目状态:
已结题
起止时间:
2019-07-15 至 2024-06-30

项目摘要

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中文摘要
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英文摘要
Artificial Intelligence (AI) is expected to become a disruptive force for both emerging and mature industry sectors. However, current AI progress is mostly driven by software and algorithm advances, while physical AI implementation is limited by hardware systems that were primarily developed to perform conventional computing tasks. Large scale implementation of AI in smart homes, robotics and autonomous vehicles will only become possible with hardware innovations, through new computing architectures and devices that can overcome the limits of today's systems in terms of power efficiency and speed. This project aims at precisely addressing these problems through the development of a new in-memory computing architecture that is naturally suited for AI applications. Undergraduate and graduate students will be trained to become experts at the interface of nanoelectronic devices and computing architecture, and be able to join the workforce of computer engineering and semiconductor research and development. The knowledge developed in this project will also be widely disseminated to the general public through publications, tutorials, course modules, high-school visits and industry partnerships. The proposed project will lead to a new computing architecture that is fundamentally efficient, parallel, modular and reconfigurable. Unlike specialized accelerators designed for specific algorithms, the project aims at developing a general memory-centric hardware platform that can be used for a broad range of computing tasks. The program will be carried out through multidisciplinary research efforts organized around five central thrusts that cover small scale prototype and circuit verification, uniform module development, scalable chip design, algorithm mapping, and system benchmarking and optimization. Key performance parameters will be measured and optimized, while new devices, circuit components, design tools and simulation packages will be developed and shared with the research community and the general public to help broaden the impact of the project.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
期刊论文(14)
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科研奖励(0)
会议论文
Device Non-Ideality Effects and Architecture-Aware Training in RRAM In-Memory Computing Modules
RRAM 内存计算模块中的设备非理想效应和架构感知训练
DOI: 10.1109/iscas51556.2021.9401307
发表时间: 2021
期刊: 2021 IEEE International Symposium on Circuits and Systems (ISCAS
影响因子: --
作者: [Wang, Qiwen, Park, Yongmo, Lu, Wei D.]
通讯作者: Lu, Wei D.
Deep Neural Network Mapping and Performance Analysis on Tiled RRAM Architecture
Tiled RRAM 架构的深度神经网络映射和性能分析
DOI: 10.1109/aicas48895.2020.9073942
发表时间: 2020
期刊: 2020 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS
影响因子: --
作者: [Wang, Xinxin, Wang, Qiwen, Meng, Fan-Hsuan, Lee, Seung Hwan, Lu, Wei D]
通讯作者: Lu, Wei D
Device Variation Effects on Neural Network Inference Accuracy in Analog In‐Memory Computing Systems
设备变化对模拟内存计算系统中神经网络推理精度的影响
DOI: 10.1002/aisy.202100199
发表时间: 2022
期刊: Advanced Intelligent Systems
影响因子: 7.4
作者: [Wang, Qiwen, Park, Yongmo, Lu, Wei D.]
通讯作者: Lu, Wei D.
RRAM-enabled AI Accelerator Architecture
支持 RRAM 的 AI 加速器架构
DOI: 10.1109/iedm19574.2021.9720543
发表时间: 2021
期刊: 2021 IEEE International Electron Devices Meeting (IEDM
影响因子: --
作者: [Wang, Xinxin, Wu, Yuting, Lu, Wei D.]
通讯作者: Lu, Wei D.
11
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    I-Corps: Dendrite-Suppressing Separator for Next Generation Lithium-ion Batteries
    Collaborative Research: Integrated memristor neural networks for in-situ analysis of intracellular neuronal recordings
    Design and growth of high entropy oxides with tailored ionic dynamics for memory and computing applications
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