SHF: Small: Collaborative Research: Testing and Design-for-Testability Solutions for 3D Stacked Integrated Circuits

SHF：小型：协作研究：3D 堆叠集成电路的测试和可测试性设计解决方案

• 批准号: 1017391
• 负责人: Krishnendu Chakrabarty
• 金额: $ 20万
• 依托单位: Duke University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2010
• 资助国家: 美国
• 起止时间: 2010-09-01 至 2014-08-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1017391&HistoricalAwards=false
• 关键词: SHF; Small; Collaborative; Research; Testing

Three-dimensional stacked integrated circuits (3D SICs) promise to overcome barriers in interconnect scaling, thereby offering an opportunity to get higher performance using CMOS technology. This collaborative project between Duke University and Pennsylvania State University is focused on test and design-for-testability (DFT) solutions for 3D SICs. Topics being investigated include: (i) fault modeling and test generation, where the goal is to develop new fault models and test generation methods that can effectively target defects unique to 3D SICs; (ii) DFT infrastructure, optimization techniques for test access, and test scheduling methods for pre-bond test and post-bond test; (iii) Test economics and a cost-analysis framework, where test cost is being incorporated into cost models for 3D IC design and fabrication. This project will facilitate further advances in 3D integration and wider adoption of this emerging technology by the semiconductor industry. Innovations in test methods, DFT, and cost modeling will therefore have a transformative impact on the way in which semiconductor chips are designed and fabricated. Undergraduate and graduate students involved in this research will be trained for the next-generation semiconductor industry workforce. Tools and techniques developed in this research will be used in teaching existing courses and developing new courses. A virtual classroom through web delivery will facilitate collaborative lectures originating from Duke and Penn State. The PIs will make tools available through the web for use by other educators, researchers, and industry practitioners. At Duke, the PI will mentor undergraduate students in collaboration with the Associate Dean for Education and Outreach Programs in the Pratt School of Engineering, and generate excitement among high-school students at the North Carolina School of Science and Mathematics.

三维堆叠集成电路（3D SICs）有望克服互连缩放中的障碍，从而提供使用CMOS技术获得更高性能的机会。这个杜克大学和宾夕法尼亚州立大学之间的合作项目专注于3D SIC的测试和可测性设计（DFT）解决方案。调查的主题包括：（i）故障建模和测试生成，其目标是开发新的故障模型和测试生成方法，其可以有效地针对3D SIC特有的缺陷;（ii）DFT基础设施、用于测试访问的优化技术，以及用于键合前测试和键合后测试的测试调度方法;（iii）测试经济学和成本分析框架，其中测试成本被纳入3D IC设计和制造的成本模型。该项目将促进3D集成的进一步发展，并使半导体行业更广泛地采用这一新兴技术。因此，测试方法、DFT和成本建模方面的创新将对半导体芯片的设计和制造方式产生变革性影响。参与这项研究的本科生和研究生将接受下一代半导体行业劳动力的培训。在这项研究中开发的工具和技术将用于教学现有的课程和开发新的课程。通过网络交付的虚拟教室将促进来自杜克和宾夕法尼亚州立大学的合作讲座。PI将通过网络提供工具，供其他教育工作者、研究人员和行业从业者使用。 在杜克，PI将与普拉特工程学院教育和推广项目副院长合作指导本科生，并在北卡罗来纳州科学与数学学院的高中生中产生兴奋。