CAREER: Design of Reconfigurable Power and Area-Efficient Nanophotonic Architectures for Future Multi-cores

职业：为未来多核设计可重构功率和面积高效的纳米光子架构

• 批准号: 1054339
• 负责人: Avinash Karanth
• 金额: $ 40.76万
• 依托单位: Ohio University
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2011
• 资助国家: 美国
• 起止时间: 2011-04-01 至 2018-03-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1054339&HistoricalAwards=false
• 关键词: CAREER; Design; Reconfigurable; Power; Area

As the number of cores increases on the same die, computer architects and system designers have focused their attention to the on-chip network that is used for communication between the cores. Two of the major problems facing on-chip architectures are excessive power dissipation and reduced network performance. One approach to extend the performance of future multi-cores is to integrate new technologies, such as nano-photonics into the electronic design flow. Nano-photonics offers a scalable, low power per bit and a high- performance technology solution to current electrical signaling and interconnect bottlenecks. This research seeks to exploit this emerging field of nano-photonics and design reconfigurable, energy-efficient and high- performance on-chip architectures and switching interconnects. The goal of this research is to develop interconnects that can dynamically tune to the application and regulate power and bandwidth without system intervention. The proposed research will have a significant impact on the design of future multi-cores using nano-photonics. The proposed research will make advances in the understanding of the interplay between performance, energy, hardware complexity and reconfigurability. This research will also play a major role in education by integrating research with teaching and training. The educational goal of this multi-disciplinary and multi-faceted proposed research is to expose undergraduate and graduate students to diverse technological advancements with an emphasis on critical analysis and reasoning to overcome limitations of current technologies. Finally, the results and findings of the proposed research will be disseminated to researchers, engineers and educators through technical publications and presentations.

随着同一芯片上内核数量的增加，计算机架构师和系统设计人员将注意力集中在用于内核之间通信的片上网络上。片上架构面临的两个主要问题是过度的功耗和降低的网络性能。扩展未来多核性能的一种方法是将纳米光子学等新技术集成到电子设计流程中。纳米光子学为当前的电信号和互连瓶颈提供了可扩展的、每比特低功率和高性能的技术解决方案。本研究旨在利用纳米光子学这一新兴领域，设计可重构、节能和高性能的片上架构和交换互连。本研究的目标是开发可以动态调整应用程序和调节功率和带宽而无需系统干预的互连。这项研究将对未来使用纳米光子学的多核设计产生重大影响。所提出的研究将在性能，能量，硬件复杂性和可重构性之间的相互作用的理解的进步。这项研究还将通过将研究与教学和培训相结合，在教育中发挥重要作用。这项多学科和多方面的拟议研究的教育目标是让本科生和研究生接触到不同的技术进步，重点是批判性分析和推理，以克服当前技术的局限性。最后，拟议研究的结果和结论将通过技术出版物和介绍传播给研究人员、工程师和教育工作者。