EAGER: Wafer Scalable Dry Transfer of Graphene onto Silicon Substrates

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EAGER: Wafer Scalable Dry Transfer of Graphene onto Silicon SubstratesNon-technical: Integrating graphene with silicon technology is widely considered among the greatest prospects for translating graphene research from academic laboratories to practical commercial applications. This heterogeneous nanotechnology can benefit from the maturity and complexity of silicon electronics while taking advantage of the outstanding electronic, mechanical, optical, thermal and sensor properties of graphene to realize advanced devices on semiconductor chips. Despite the broad recognition of the need to integrate graphene with silicon, progress has been very limited largely due to the difficult of removing graphene from its growth surface in a benign manner compatible with semiconductor technology. Several transfer methods such as wet lift-off transfer, and electrochemical delamination that are convenient for small samples, are not scalable to full wafer sizes, which are required for practical very large scale integration with silicon. In this effort, we propose a wafer-scalable dry transfer of graphene onto silicon substrates that offers several advantages including a contamination-free graphene surface. The proposed dry transfer method is a low temperature method compatible with silicon technology. This effort has the potential to overcome the biggest barrier for practical graphene-silicon integration. The results of this effort is expected to lead to future academic industry partnerships for commercial applications that can benefit the broader society. Technical: Graphene is a relatively new advanced nanomaterial that has many unique and outstanding properties that could benefit semiconductor technology, which is the backbone of computer chips, mobile phones, and portable electronics. However, it has been difficult to integrate graphene onto silicon semiconductor chips owing to the current constrain that requires growing the film on a metallic substrate such as copper which is not suitable for semiconductor electronics. Furthermore, single layer graphene, which is the thinnest known material is very fragile and susceptible to tears during film transfer based on existing chemical or solution-based methods. In this research, we explore the idea of using small controllable mechanical forces to directly peel graphene from its original substrate directly onto silicon semiconductor chips. Preliminary results indicate this idea is feasible and further research will increase the prospects for graphene integration onto commercial computer and electronic chips to benefit society. In addition, the graduate student and post-doctoral researchers working on this research effort will gain advanced scientific and engineering skills needed to be technical leaders in industry, academia or government post-graduate careers. Moreover, undergraduate students from diverse backgrounds will be recruited to participate in the research effort to promote advanced science and engineering careers.