GOALI: Multi-Objective Layout Optimization for Multi-Chip Power Electronic Modules

碳化硅(SiC)和氮化镓(GaN)等半导体材料的进步导致了功率器件的实质性进步，现在正处于主导地位，将取代硅器件成为下一代电力电子产品的主导。本项目致力于电力电子模块自动布局自动化软件的设计。预计到2022年，GaN器件的市场份额将达到惊人的156亿美元，这主要是由于电力和能源部门、通信基础设施部门和电力电子市场的需求不断增长。碳化硅功率器件预计也将以同样令人印象深刻的速度增长。这些新的电力设备预计将减少总的能源转换损失，仅在美国一年就可节省数百亿美元。高效和绿色的能源基础设施对于减少总体支出和减少环境中的碳足迹至关重要。这些新技术需要更多的封装级集成，以实现低电感、平衡阻抗和适当的热管理，以实现它们所承诺的高性能和长寿命。这项研究的预期成果是一种软件工具，它融合了先进的算法，将提高工程师的设计生产率，同时以现代设计工具确保集成电路(IC)同样的方式增强多芯片电源模块的性能和可靠性。集成电路行业的设计工具在全球消费电子产品的巨大进步中发挥了不可或缺的作用。该工具将影响的电力电子可以在所有类型的应用中找到，如数据中心、电动汽车、火车、飞机、电网和所有类型的电机驱动，如供暖和空调机组。电子设计自动化(EDA)工具的学术研究团队和经验丰富的行业开发人员将专注于PowerSynth的模型和算法，PowerSynth是一种电源模块布局综合工具。初步调查结果表明，需要确保电源模块设计，特别是那些开关频率在数百千赫的电源模块，符合EMI/EMC标准。此外，业界对这些早期发现的反馈表明，可制造性是降低成本和成功推出宽禁带电力电子产品的首要考虑因素。必须仔细考虑电子封装的性能和可靠性。这项研究的目标是创建一种优化驱动的方法来产生多芯片电源模块(MCPM)的几何布局，这些布局考虑了同时存在的电气、热和机械问题，这些问题可能会对电子产品的性能和可靠性产生不利影响。电气寄生建模、热建模、机械应力/应变建模和优化算法方面的进展都有望作为项目路线图的一部分。这些进展将最终形成一种软件工具，该工具可以合成几何布局，最大限度地减少和平衡电气寄生，管理封装内的热分布，并减轻牺牲模块完整性的机械应力。最后，可靠性分析将形成可量化的可制造性指标的基础。

Advances in semiconductor materials such as silicon carbide (SiC) and gallium nitride (GaN) have led to substantial advances in power devices and are now positioned to dominate the next generation of power electronics replacing silicon devices. This project focuses on design automation software for the automatic layout of power electronic modules. The market share of GaN devices is expected to reach a staggering $15.6 billion by 2022 mainly due to the growing demands in the power and energy sector, the communication infrastructure sector, and the power electronics market. SiC power devices are also expected to grow at equally impressive rates. These new power devices are expected to reduce overall energy conversion losses resulting in an annual savings in the tens of billions of dollars in the US alone. A high-efficiency and green energy infrastructure is vital for reducing overall expenditures and reducing carbon footprint in the environment. These new technologies demand more package level integration to achieve low inductance, balanced impedances, and appropriate thermal management to realize the high performance and long life they promise. The expected outcome from this research effort is a software tool incorporating advanced algorithms that will improve design productivity for engineers while simultaneously enhancing performance and reliability of multi-chip power modules in an analogous way that modern design tools ensure the same for integrated circuitry (IC). Design tools in the IC industry have played an indispensable role in the tremendous advances in consumer electronics worldwide. The power electronics that this tool will impact can be found in all types of applications such as data centers, electric vehicles, trains, airplanes, the electric power grid, and motor drives of all types such as heating and air conditioning units.A team of academic researchers and experienced industrial developers of electronic design automation (EDA) tools will focus on the models and algorithms of PowerSynth, a power module layout synthesis tool. Preliminary findings indicate a need for guaranteeing that power module designs, in particular those that switch at frequencies in the hundreds of kHz, conform to EMI/EMC standards. Further, industrial feedback with respect to those early findings indicate that manufacturability is a first order concern in cost reduction and successful market introduction of wide bandgap power electronics. Electronic packaging must be carefully considered for both performance and reliability. The goals of this research are to create an optimization-driven method for producing the geometrical layouts of multi-chip power modules (MCPMs) that account for the simultaneous electrical, thermal and mechanical issues that can adversely impact performance and reliability of the electronics. Advances in electrical parasitics modeling, thermal modeling, mechanical stress/strain modeling, and optimization algorithms are all expected as part of the project roadmap. These advances will culminate in a software tool that can synthesize geometrical layouts that minimize and balance electrical parasitics, manage thermal distribution in-package, and mitigate mechanical stresses that sacrifice module integrity. Finally, reliability analyses will form the basis for quantifiable manufacturability metrics.