GOALI: Multi-Objective Layout Optimization for Multi-Chip Power Electronic Modules

碳化硅（SiC）和氮化镓（GaN）等半导体材料的进步导致了功率器件的实质性进步，现在已经定位为取代硅器件的下一代电力电子产品的主导地位。本课题主要研究电力电子模块自动布局自动化软件的设计。到2022年，GaN器件的市场份额预计将达到惊人的156亿美元，这主要是由于电力和能源部门、通信基础设施部门和电力电子市场的需求不断增长。SiC功率器件也有望以同样惊人的速度增长。这些新的动力装置预计将减少整体能量转换损失，仅在美国每年就可节省数百亿美元。高效、绿色的能源基础设施对于降低总体支出和减少环境碳足迹至关重要。这些新技术需要更多的封装级集成，以实现低电感，平衡阻抗和适当的热管理，以实现高性能和长寿命。这项研究工作的预期结果是一个包含先进算法的软件工具，它将提高工程师的设计效率，同时提高多芯片电源模块的性能和可靠性，就像现代设计工具确保集成电路（IC）的性能和可靠性一样。集成电路行业的设计工具在全球消费电子产品的巨大进步中发挥了不可或缺的作用。该工具将影响的电力电子设备可以在所有类型的应用中找到，例如数据中心、电动汽车、火车、飞机、电网和所有类型的电机驱动器，例如供暖和空调设备。一个由学术研究人员和经验丰富的电子设计自动化（EDA）工具的工业开发人员组成的团队将重点关注功率模块布局综合工具PowerSynth的模型和算法。初步研究结果表明，需要保证功率模块设计，特别是那些在数百kHz频率下切换的功率模块设计，符合EMI/EMC标准。此外，关于这些早期发现的工业反馈表明，可制造性是降低成本和成功引入宽带隙电力电子产品的首要问题。电子封装必须仔细考虑性能和可靠性。本研究的目标是创建一种优化驱动的方法，用于生产多芯片电源模块（mcpm）的几何布局，该布局考虑到同时存在的电气、热和机械问题，这些问题可能会对电子设备的性能和可靠性产生不利影响。在电寄生建模、热建模、机械应力/应变建模和优化算法方面的进展都有望成为项目路线图的一部分。这些进步将最终形成一个软件工具，该软件工具可以合成几何布局，从而最大限度地减少和平衡电寄生，管理封装内的热分布，并减轻牺牲模块完整性的机械应力。最后，可靠性分析将构成可量化可制造性指标的基础。

Advances in semiconductor materials such as silicon carbide (SiC) and gallium nitride (GaN) have led to substantial advances in power devices and are now positioned to dominate the next generation of power electronics replacing silicon devices. This project focuses on design automation software for the automatic layout of power electronic modules. The market share of GaN devices is expected to reach a staggering $15.6 billion by 2022 mainly due to the growing demands in the power and energy sector, the communication infrastructure sector, and the power electronics market. SiC power devices are also expected to grow at equally impressive rates. These new power devices are expected to reduce overall energy conversion losses resulting in an annual savings in the tens of billions of dollars in the US alone. A high-efficiency and green energy infrastructure is vital for reducing overall expenditures and reducing carbon footprint in the environment. These new technologies demand more package level integration to achieve low inductance, balanced impedances, and appropriate thermal management to realize the high performance and long life they promise. The expected outcome from this research effort is a software tool incorporating advanced algorithms that will improve design productivity for engineers while simultaneously enhancing performance and reliability of multi-chip power modules in an analogous way that modern design tools ensure the same for integrated circuitry (IC). Design tools in the IC industry have played an indispensable role in the tremendous advances in consumer electronics worldwide. The power electronics that this tool will impact can be found in all types of applications such as data centers, electric vehicles, trains, airplanes, the electric power grid, and motor drives of all types such as heating and air conditioning units.A team of academic researchers and experienced industrial developers of electronic design automation (EDA) tools will focus on the models and algorithms of PowerSynth, a power module layout synthesis tool. Preliminary findings indicate a need for guaranteeing that power module designs, in particular those that switch at frequencies in the hundreds of kHz, conform to EMI/EMC standards. Further, industrial feedback with respect to those early findings indicate that manufacturability is a first order concern in cost reduction and successful market introduction of wide bandgap power electronics. Electronic packaging must be carefully considered for both performance and reliability. The goals of this research are to create an optimization-driven method for producing the geometrical layouts of multi-chip power modules (MCPMs) that account for the simultaneous electrical, thermal and mechanical issues that can adversely impact performance and reliability of the electronics. Advances in electrical parasitics modeling, thermal modeling, mechanical stress/strain modeling, and optimization algorithms are all expected as part of the project roadmap. These advances will culminate in a software tool that can synthesize geometrical layouts that minimize and balance electrical parasitics, manage thermal distribution in-package, and mitigate mechanical stresses that sacrifice module integrity. Finally, reliability analyses will form the basis for quantifiable manufacturability metrics.