SHF: Small: Design/Automation for Synthesizable and Scaling Friendly Analog/Mixed-Signal Circuits

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The goal of the proposed research is to tackle two critical challenges for conventional analog and mixed-signal circuits to address scaling incompatibility and low design productivity. The proposed time-domain analog mixed signal circuits are scaling compatible, and can achieve higher performance with substantially reduced chip area, power, and cost. They address the critical real-world challenge of cost effectively integrating analog-mixed-signal circuits with digital functions. They can enable emerging applications that demand ultra-low-power and ultra-low voltage solutions. The proposed research design for synthesizability and new synthesis tools also has significant impacts on enhancing design productivity, leading to reduced cost, enhanced capability, shortened time-to-market, and improved reliability. The proposed novel time domain analog-mixed-signal circuits process analog information in the time or phase domain. Thus, they naturally benefit from CMOS scaling with increased transistor speed and reduced delay. Moreover, this proposal opens up a new research direction of analog-mixed-signal design for synthesizability, the objective of which is to alleviate the difficulty in analog synthesis by intentionally creating new topologies that are synthesis friendly. New analog synthesis tools will be developed, with focus on developing compact and high-fidelity models to reduce runtime and tackle process variation. Several previously untouched issues will be addressed, such as sensitive node protection, current flow constraints, and substrate noise coupling. A new machine-learning based framework will also be developed to further increase automation level.