CSR: Small: Architectural Support for Programmable Memory Metadata

CSR：小型：可编程内存元数据的架构支持

• 批准号: 1719061
• 负责人: Mattan Erez
• 金额: $ 50万
• 依托单位: University of Texas at Austin
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2017
• 资助国家: 美国
• 起止时间: 2017-09-01 至 2021-08-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1719061&HistoricalAwards=false
• 关键词: CSR; Small; Architectural; Support; Programmable

All computers heavily rely on large and growing memory capacity to handle increasingly diverse, challenging, and data-intensive computation. In order to utilize memory effectively and efficiently, provide high performance, and guarantee security and privacy, computer systems associate memory metadata with all information stored in memory. This metadata stores system-managed information about the data rather than application data directly and is vital for correctness and performance. Storing, accessing, and updating metadata presents unique tradeoff opportunities between metadata cost and performance overheads and the benefits metadata can provide. Conventional approaches have been to couple metadata management with the management of memory itself (in the form of virtual memory) and have evolved very slowly over time. However, this approach is facing increasing difficulties as computer memory systems evolve to be larger, more heterogeneous, and organized in deeper hierarchies. Such revolutionary memory systems require an equally revolutionary architecture for managing and accessing metadata. This project is researching and exploring such a metadata architecture. This research is sorely needed as both academia and industry are continually finding new uses for metadata but are often left with poor metadata mechanisms that are at the wrong granularity, have too high an overhead on performance, and are too complex to implement. Therefore, the wrong tradeoffs are often made between performance, security, safety, and reliability. The results of this research will directly lead to secure, reliable, performant, and efficient computer systems that provide strong privacy guarantees, which are all crucial to the computing systems both scientists and society in general have come to rely on. The approach is to decouple metadata management from data memory management (virtual memory) while exposing metadata management mechanism architecturally to alleviate many of the above limitations. This metadata architecture will be programmable from within the microarchiture and also by system software and provide new levels of flexibility and capabilities. Specifically, the research answers questions on how to: (1) decouple general memory metadata from system-critical translation and protection; (2) coordinate metadata across multiple storage/access mechanisms with different tradeoffs in overhead and granularity; (3) construct expressive yet efficient interfaces for memory metadata; and (4) provide the tools needed by researchers and industry to analyze memory management ideas.

所有计算机都严重依赖庞大且不断增长的内存容量来处理日益多样化、具有挑战性的数据密集型计算。为了有效且高效地利用内存、提供高性能并保证安全和隐私，计算机系统将内存元数据与存储在内存中的所有信息相关联。该元数据存储有关数据的系统管理信息，而不是直接存储应用程序数据，对于正确性和性能至关重要。存储、访问和更新元数据在元数据成本和性能开销以及元数据可以提供的好处之间提供了独特的权衡机会。传统的方法是将元数据管理与内存本身的管理（以虚拟内存的形式）结合起来，并且随着时间的推移发展得非常缓慢。 然而，随着计算机存储系统变得更大、更加异构并且组织成更深的层次结构，这种方法面临着越来越多的困难。这种革命性的内存系统需要同样革命性的架构来管理和访问元数据。本项目正在研究和探索这样的元数据架构。这项研究是迫切需要的，因为学术界和工业界都在不断寻找元数据的新用途，但往往留下糟糕的元数据机制，这些机制的粒度错误，性能开销过高，并且实现起来过于复杂。因此，常常在性能、安全性、安全性和可靠性之间做出错误的权衡。这项研究的结果将直接带来安全、可靠、高性能和高效的计算机系统，提供强有力的隐私保证，这对于科学家和整个社会所依赖的计算系统至关重要。该方法是将元数据管理与数据内存管理（虚拟内存）解耦，同时在架构上公开元数据管理机制以减轻上述许多限制。该元数据架构将可以从微架构内部以及系统软件进行编程，并提供新水平的灵活性和功能。具体来说，该研究回答了如何以下问题：（1）将通用内存元数据与系统关键的转换和保护分离； (2) 跨多种存储/访问机制协调元数据，在开销和粒度上进行不同的权衡； (3) 为内存元数据构建富有表现力且高效的接口； (4) 提供研究人员和工业界分析内存管理思想所需的工具。

项目成果

Reducing Load Latency with Cache Level Prediction

• DOI: 10.1109/hpca53966.2022.00054
• 发表时间: 2021-03
• 期刊: 2022 IEEE International Symposium on High-Performance Computer Architecture (HPCA)
• 作者: Majid Jalili;M. Erez

Compresso: Pragmatic Main Memory Compression

• DOI: 10.1109/micro.2018.00051
• 发表时间: 2018-10
• 期刊: 2018 51st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)
• 作者: Esha Choukse;M. Erez;Alaa R. Alameldeen

CompressPoints: An Evaluation Methodology for Compressed Memory Systems

CompressPoints：压缩内存系统的评估方法

• DOI: 10.1109/lca.2018.2821163
• 发表时间: 2018
• 期刊: IEEE Computer Architecture Letters
• 影响因子: 2.3
• 作者: Choukse, Esha;Erez, Mattan;Alameldeen, Alaa
• 通讯作者: Alameldeen, Alaa