SHF: Small: Architectural Techniques for Energy-Efficient Brain-Machine Implants

该项目的重点是开发神经假体或大脑植入物，以促进科学界对大脑如何工作的理解，并朝着设计神经系统疾病的治疗方法迈出一步。脑植入物是通过手术嵌入颅骨下（分别在科学实验和治疗神经系统疾病的背景下的动物或人类）并放置在脑组织上的设备，在那里它们刺激和记录数百个神经元。这些设备今天被用来记录神经元电生理数据，以解开大脑的奥秘;用深部脑刺激等技术治疗帕金森病，妥瑞氏综合征和癫痫的症状;并通过运动皮层植入物为那些患有瘫痪或脊髓损伤的人提供治疗。大脑植入物的一个关键设计问题是，它们是高度能量受限的，因为它们被嵌入头骨下，而无线供电等技术可以加热植入物周围的脑组织。该项目提供了架构技术，以降低功耗和能量使用的处理元件集成在大脑植入物，无论是通用处理器，定制集成电路，或可编程硬件。在科学研究的同时，该项目还整合了一个教育部分，对高中生、本科生和博士生进行神经工程技术的培训，这些技术对社会继续努力揭示大脑如何工作至关重要。在技术细节方面，该项目首次对架构技术进行研究，通过利用现有的低功耗模式来提高植入式嵌入式处理器的能源效率。低功率模式可以在没有感兴趣的神经元活动的情况下使用，这对应于植入物不执行有用工作并且处理器可以减慢的时间段。这个项目的一个关键主题是展示传统上用于预测程序行为的硬件（例如，分支或高速缓存重用）也可以被增选来预测大脑活动，并因此预测感兴趣/不感兴趣的神经元尖峰。因此，这种预测器可以用于驱动植入处理器进入和退出低功率模式。该项目研究如何设计硬件大脑活动预测器，准确，可扩展，有效地预测神经元活动，以及如何将这些预测器与低功耗模式集成在商品嵌入式处理器上。这些技术来自用于程序预测的硬件机器学习方法，并考虑从小鼠，绵羊和猴子的大脑部位提取的神经元尖峰数据。这些方法的成功部署预计将节省多达85%的处理器能源，有效地将为小鼠设计的植入物的电池寿命提高四倍。该奖项反映了NSF的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。

This project focuses on the development of neural prostheses or brain implants to advance the scientific community's understanding of how the brain works, and to take a step towards devising treatment for neurological disorders. Brain implants are devices that are surgically embedded under the skull (of animals or humans in the context of scientific experiments and treatment of neurological disorders respectively) and placed on brain tissue, where they stimulate and record from hundreds of neurons. These devices are being used today to record neuronal electro-physiological data to unlock mysteries of the brain; to treat symptoms of Parkinson's disease, Tourette's syndrome, and epilepsy, with techniques like deep brain stimulation; and to offer treatment to those afflicted by paralysis or spinal cord damage via motor cortex implants. A key design issue with brain implants is that they are highly energy constrained, because they are embedded under the skull, and techniques like wireless power can heat up the brain tissue surrounding the implant. This project offers architectural techniques to lower the power consumption and energy usage of processing elements integrated on brain implants, whether they are general-purpose processors, customized integrated circuits, or programmable hardware. In tandem with its scientific studies, this project integrates an educational component to train high-school students, undergraduates, and PhD students on neuro-engineering techniques crucial to the society's continued efforts to shed light on how the brain works. In terms of technical details, this project performs the first study on architectural techniques to improve the energy efficiency of embedded processors on implants by leveraging their existing low-power modes. Low-power modes can be used in the absence of interesting neuronal activity, which corresponds to periods of time when the implant is not performing useful work and the processor can be slowed down. A critical theme of this project is to show that hardware traditionally used to predict program behavior (e.g., branches or cache reuse) can also be co-opted to also predict brain activity, and hence anticipate interesting/non-interesting neuronal spiking. Such predictors can consequently be used to drive the implant processor in and out of low power mode. This project studies how to design hardware brain activity predictors that predict neuronal activity accurately, scalably, and efficiently, and how to integrate such predictors with low power modes on commodity embedded processors. The techniques are drawn from hardware machine-learning approaches for program prediction and consider neuronal spiking data extracted from brain sites on mice, sheep, and monkeys. Successful deployment of these approaches is expected to save as much as 85% of processor energy, effectively quadrupling battery lifetimes on implants being designed for mice.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.