FoMR: IPC Improvement through Hardware Memorization

FoMR：通过硬件记忆改进 IPC

• 批准号: 1912517
• 负责人: Michael Ferdman
• 金额: $ 20万
• 依托单位: SUNY at Stony Brook
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2019
• 资助国家: 美国
• 起止时间: 2019-10-01 至 2024-09-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1912517&HistoricalAwards=false
• 关键词: FoMR; IPC; Improvement; through; Hardware

Although chip manufacturers continue to increase the number of transistors that can fit into a single computer chip, making use of these additional transistors to improve performance of new computers is increasingly more challenging. In the past several years, the pace of performance improvements of each generation of computer processors have come down, with the traditional techniques for improving performance reaching diminishing returns. This work develops Speculative Memoization, a new technique with potential to more effectively use additional transistors for improving processor performance. Speculative Memoization can enable significant increases in the performance of future computers, increasing user productivity and providing more immersive user experiences.Traditional ways of improving processor performance targeted increasing the sizes of on-chip buffers, such as caches, re-order buffers, and branch predictors. Increasing the buffer sizes offers some performance improvement, but does not reduce the total work done by the processor. Instead, Speculative Memoization offers a radical alternative, identifying repeating work that the processor has already done and avoiding redundant execution, therefore, improving performance by reducing the total amount of work done by the processors. This work explores the limits of performing memoization in hardware, proposes designs for the hardware memoization mechanisms, and works to mitigate the compiler and system software effects on such memorization.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

尽管芯片制造商继续增加可以适合单个计算机芯片的晶体管数量，但利用这些额外的晶体管来提高新计算机的性能越来越具有挑战性。在过去的几年中，每一代计算机处理器的性能改进的速度都降低了，传统的技术可以提高性能达到降低的回报。这项工作开发了投机性纪念活动，这是一种新技术，有可能更有效地使用其他晶体管来改善处理器的性能。投机性纪念活动可以使未来计算机的性能显着提高，提高用户生产率并提供更多沉浸式的用户体验。改善处理器绩效的传统方式可以提高芯片缓冲区的大小，例如固定片，重新订购缓冲区和分支预测器。增加缓冲尺寸可提供一些性能的改进，但并不能减少处理器完成的总工作。取而代之的是，投机性回忆提供了一种根本的替代方案，确定了处理器已经完成的重复工作，并避免了冗余执行，因此，通过减少处理器完成的工作总量来提高性能。这项工作探讨了在硬件中执行记忆的局限性，为硬件记忆机制提出了设计，并致力于减轻编译器和系统软件对这种记忆的影响。该奖项反映了NSF的法定任务，并被认为是通过基金会的知识分子和更广泛的影响来评估的支持，并被认为是值得的。