High-Performance and CMOS-Compatible Electrochemical Random Access Memory For Neuromorphic Computing

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Artificial intelligence has made phenomenal progress in recent years. It is having a remarkable social impact with emerging applications such as face recognition and self-driving cars. However, such improvement comes with the cost of aggressively increased depth and size of the deep neural network models utilized, which leads to exponentially increasing computational load. This poses significant challenges for hardware implementations in terms of computation, memory, and communication resources. The objective of this project is to develop the next-generation neuro-inspired deep-learning hardware, which has potential to perform the data-intensive computation required by the artificial-intelligence algorithms with thousands times higher energy efficiency, compared to what is possible using current silicon complementary metal-oxide-semiconductor technology. The educational goal is to sustain STEM workforce pipeline development by exploiting the outreach opportunities and knowledge generated in the proposed project. Efforts will be to establish hands-on module for K-6 students to learn the difference between computer-based expert system and the human/machine learning process, as well as the working principles of artificial synapses for neuromorphic computing, with the purpose of introducing engineering to them. At the undergraduate level, PI proposes to incorporate case-analysis in engineering class, by capitalizing on PI’s industrial experiences. The target will be to help students develop the capability of using engineering judgement in decision-making regarding realistic technology development problems, which will have direct connection to what they learn in classroom.To achieve this objective, new types of high-performance and silicon complementary metal-oxide-semiconductor compatible electrochemical random access memories will be designed, fabricated, characterized, and optimized. These devices can serve as multi-level artificial synapses with near-symmetric weight update in response to pulsed input to dramatically accelerate the online training and the inference of deep neural networks. More specifically, two novel device prototypes will be explored in parallel during the grant term: one operates based on the resistance switch in a functional oxide channel modulated by the gate-controlled reversible insertion of protons from oxides with high ionic conductivity; the other is based on the resistance switch in multilayered two-dimensional semiconductors modulated by the gate-controlled intercalation of copper ions from fast ion-transporting metal-chalcogenide glass. A symmetric gate-channel stack will be adopted to minimize the drift of the device open-circuit potential during operation. The scientific goal of this project is to elucidate the correlation between the intercalant types, properties of the corresponding solid-state electrolytes and the intercalatable channels, device dimensions, and the electrochemical random access memory performance, using a combination of experiment and physics-driven device modeling. The technological goal is to move electrochemical random access memory from initial proof-of-concept demonstrations to a practical technology. Material innovations will firstly be applied on all the components across the device gate-channel stack to drastically enhance their performance, especially the device speed, retention, and endurance. Individual memory cells with sub-100 nm dimensions and 3 by 3 pseudo-crossbar arrays will then be demonstrated. These efforts will help us assess the technological promise of electrochemical random access memory, especially their ultimately achievable speed and their scalability into both nanoscale devices and large-scale integrated arrays.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.