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SHF: SMALL: Collaborative Research: Reconfigurable and Programmable Processor Architectures for Brain-Computer Interfacing

SHF：小型：协作研究：用于脑机接口的可重构和可编程处理器架构

基本信息

批准号：
2007131
负责人：
Amirhossein Alimohammad
金额：
$ 32万
依托单位：
San Diego State University Foundation
依托单位国家：
美国
项目类别：
Standard Grant
财政年份：
2020
资助国家：
美国
起止时间：
2020-07-01 至 2024-06-30
项目状态：
已结题

来源：
https://www.nsf.gov/awardsearch/showAward?AWD_ID=2007131&HistoricalAwards=false
关键词：
SHF SMALL Collaborative Research Reconfigurable

项目摘要

One of the primary motivations of brain-computer interfaces (BCIs) is to restore behavioral functions for patients who are unable to move or communicate through normal neural pathways because of strokes or chronic diseases. Restoring a full range of movements for paralyzed patients requires recordings from a relatively large population of brain neurons. Wireless transmission of large amounts of neural data for off-line processing on a computer imposes heat-related tissue damage and hinders real-time control of the prosthetics. In this SHF collaborative research, a foundation is laid for finding an optimal balance between real-time neural-signal processing using a brain-implantable electronic device and wireless data transmission for offline processing on a machine or computer so that the total power/energy consumption of the brain-implanted integrated circuit is minimized. This research focuses on a transformative BCI-specific processor architecture utilizing custom digital circuits to drastically relax power-hungry wireless data transmission while controlling prosthetics in real-time. The impact of research findings on education and society include: broadening the participation of underrepresented high school students using the new "Brain Chips" outreach program; enhancing educational learning via the "lab-at-home" approach; engaging the local community and broader society, especially those with disabilities, via workshops at the Disability Center San Diego; and contributing to rehabilitation and improving the quality of life of millions of patients suffering from neurodegenerative diseases or paralysis.This research creates a hybrid processor that is both software-programmable to efficiently execute neural-signal processing algorithms and hardware-reconfigurable to adopt a configurable instruction set architecture (ISA). The software-programmability supports the continuing evolution of approaches and algorithmic improvements while utilizing lower silicon area. Rather than optimized algorithms mapped onto a fixed-processor architecture, the processor optimally matches the specific requirements of the BCI algorithms at runtime by adopting a configurable ISA instead of a fixed and predetermined set of instructions and hence attains greater energy efficiency. The processor also utilizes various dedicated hardware architectures, including artificial and spiking neural networks, for area and energy-efficient processing of neural signals, transmitting only the translated commands directly to prosthetic devices and thus, minimizing the wireless communication overhead.To find and assess candidate neural-signal processing algorithms for real-time operation on the brain-implantable processor, this multidisciplinary research boosts the search in the large design space of neural-signal processing via a software-based performance and accuracy analysis tool that will reliably measure their important characteristics. By quantitatively comparing the potential neural-signal processing algorithms using meaningful efficiency and accuracy metrics, the BCI-specific processor and dedicated hardware architectures will be optimized for energy-efficient operation. The hybrid processor architecture and the design specifications are optimized by testing the BCI system at the Washington National Primate Research Center at the University of Washington in macaque monkeys.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

脑机接口（BCI）的主要动机之一是恢复因中风或慢性疾病而无法通过正常神经通路移动或交流的患者的行为功能。恢复瘫痪患者的全方位运动需要相对大量的大脑神经元的记录。无线传输大量神经数据用于计算机上的离线处理，会造成与热相关的组织损伤，并阻碍对假肢的实时控制。在这项SHF合作研究中，为在使用脑植入电子设备的实时神经信号处理和机器或计算机上离线处理的无线数据传输之间找到最佳平衡奠定了基础，从而使脑植入集成电路的总功率/能量消耗最小化。这项研究的重点是一个变革性的BCI专用处理器架构，利用定制的数字电路，大大放松功耗无线数据传输，同时实时控制假肢。研究结果对教育和社会的影响包括：利用新的“脑芯片”外联方案扩大代表性不足的高中生的参与;通过“家庭实验室”方法加强教育学习;通过圣地亚哥残疾中心的讲习班，使当地社区和更广泛的社会，特别是残疾人参与;并为数百万患有神经退行性疾病或瘫痪的患者的康复和改善生活质量做出贡献。这项研究创造了一种混合处理器，该处理器既可以软件编程以有效执行神经信号处理算法，也可以硬件编程以有效执行神经信号处理算法。可重新配置以采用可配置指令集架构（伊萨）。软件可编程性支持方法和算法改进的持续发展，同时利用更低的硅面积。不是映射到固定处理器架构上的优化算法，处理器通过采用可配置的伊萨而不是固定和预定的指令集来在运行时最佳地匹配BCI算法的特定要求，从而获得更高的能量效率。处理器还利用各种专用硬件架构，包括人工神经网络和尖峰神经网络，用于神经信号的区域和能量有效处理，仅将翻译的命令直接传输到假体设备，从而最小化无线通信开销。这一多学科研究通过基于软件的性能和准确性分析工具促进了对神经信号处理的大设计空间的研究，该工具将可靠地测量其重要特性。通过使用有意义的效率和准确性指标定量比较潜在的神经信号处理算法，BCI专用处理器和专用硬件架构将针对节能操作进行优化。该混合处理器架构和设计规范是通过在华盛顿大学的华盛顿国家灵长类动物研究中心在猕猴身上测试BCI系统而优化的。该奖项反映了NSF的法定使命，并通过使用基金会的智力价值和更广泛的影响审查标准进行评估而被认为值得支持。