ACED Fab: Ultrafast, low-power AI chip with a new class of MRAM for learning and inference at edge

在高级芯片工程设计和制造（ced Fab）计划下，该项目的合作团队将致力于在边缘计算的人工智能（AI）领域取得令人兴奋的进展，例如基于智能手机（一种边缘设备）中的个性化或敏感数据的安全机器学习，而无需诉诸远程数据中心的服务器。该项目引入了一种新型磁阻随机存取存储器（MRAM），称为自旋转移扭矩（STT）辅助自旋轨道扭矩(SOT)-MRAM (SAS-MRAM)，具有超低功耗和超快写入速度的特点。通过与CMOS电路共同设计SAS-MRAM，该项目旨在创建节能的边缘人工智能系统。SAS-MRAM的非易失性消除了待机泄漏功率，与使用静态随机存取存储器（SRAM）的现有方法相比，边缘ai芯片在系统层面上更加节能。该项目的活动不仅限于技术进步，还包括K-12 STEM推广、本科/研究生培训、创新和创业课程开发，以及扩大微电子STEM领域和半导体行业中代表性不足的少数群体的参与。该团队在教育和包容性方面的努力将为微电子行业的多元化和创新未来做出贡献。具有超低功耗和超快写入速度的新型SAS-MRAM将与CMOS电路共同设计，用于节能边缘人工智能应用。SAS-MRAM将通过定制的后端线（BEOL）工艺在TN40G CMOS芯片上制造。该团队将系统地进行微磁仿真和HSpice仿真，以构建共同设计SAS-MRAM和CMOS电路所需的工艺开发套件（PDKs）。此外，该项目将利用SAS-MRAM为边缘人工智能设计、优化和制作内存计算（IMC）芯片原型，该芯片可以实现片上推理和训练计算。最后，该项目将开发新的持续学习算法，可以最大限度地减少内存权重更新（即内存写入）和计算复杂性，使人工智能系统能够在不忘记先前学习的知识的情况下学习新数据。由于非易失性MRAM的待机泄漏功率为零，因此由此产生的edge-AI芯片在系统层面上将比基于SRAM的流行对应物更加节能。基于SAS-MRAM的设备上训练/学习可能超快，因为更密集的比特单元和共享SOT写线的多比特写入的延迟更低。该项目可能会通过利用SAS-MRAM和内存计算来创建具有更高性能的节能人工智能系统，从而彻底改变边缘人工智能设备和系统。该奖项反映了美国国家科学基金会的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。

The collaborative team of this project under Advanced Chip Engineering Design and Fabrication (ACED Fab) program will be working on an exciting advancement in the field of artificial intelligence (AI) for edge computing, such as secured machine learning based on personalized or sensitive data in smartphones (a type of edge devices) without resorting to a server at a remote data center. The project introduces a new class of Magnetoresistive Random Access Memory (MRAM) called Spin-transfer torque (STT) Assisted Spin-orbit torque (SOT)-MRAM (SAS-MRAM) which features ultralow power consumption and ultrafast write speeds. By co-designing SAS-MRAM with CMOS circuits, the project aims to create energy-efficient edge AI systems. SAS-MRAM's non-volatile nature eliminates standby leakage power, making edge-AI chips more energy-efficient at the system level compared to existing approaches using Static Random Access Memory (SRAM). The project’s activities extend beyond technological advancements, with plans of K-12 STEM outreach, undergraduate/graduate training, curriculum development in innovation and entrepreneurship, and broadening participation of underrepresented minority groups in the microelectronics STEM field and semiconductor industry. The team’s efforts in education and inclusivity will contribute to a diverse and innovative future of the microelectronics industry. The new SAS-MRAM with ultralow power and ultrafast write speed will be co-designed with CMOS circuits for energy-efficient edge AI applications. The SAS-MRAM will be fabricated on top of a TN40G CMOS die through a custom back-end-of-line (BEOL) process. The team will systematically perform micromagnetic simulation and HSpice simulation to build Process Development Kits (PDKs) required for co-designing SAS-MRAM and CMOS circuits. Furthermore, the project will leverage SAS-MRAM to design, optimize, and tape-out an In-Memory Computing (IMC) chip prototype for edge-AI, which could implement both on-chip inference and training computation. Finally, the project will develop new continual learning algorithms that could minimize the memory weight updates (i.e., memory writes) and computing complexity, allowing the AI system to learn new data without forgetting previously learned knowledge. The resulting edge-AI chips will be significantly more energy-efficient at system level than the prevalent counterparts based on SRAM due to zero standby leakage power for non-volatile MRAM. On-device training/learning based on SAS-MRAM is potentially ultrafast due to lower latency from denser bit cells and multi-bit writing with shared SOT write lines. The project can potentially revolutionize edge AI devices and systems by leveraging SAS-MRAM and in-memory computing to create energy-efficient AI systems with improved performance.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.