Memristive tunnel junctions and CMOS integration

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In the last couple of years promising computing concepts based-on memristive devices have been presented. Nevertheless, their hardware realization is limited by a lack of reliable devices and a thorough understanding of the involved switching mechanisms on a microscopic scale. The main goal of this subproject is to close the gap between promising computing concepts and the hardware realization. CMOS-compatible devices for neuromorphic circuits will be developed. In the focus of our investigation are interface-based memristive devices. The resistance switching mechanism results from changes at a Schottky-like contact in conjunction with a varying electron tunnelling probability. This so called double barrier memristive device, has been developed in the first founding period of this project. In the current funding period the underlying chemical and physical effect, which leads to the analogue interface-based resistance switching of those devices, will be further explored and transferred to CMOS compatible materials (in particular HfOx as memristive layer). In particular, it is intend to transfer double barrier memristive devices into the BiCMOS pilot line of the IHP. At the device level, the yield, variability, predictability, energy efficiency, and the material and process compatibility to the Silicon technology will be studied. Further we will to set-up small test circuits, which allows to investigate the behaviour of the realized devices within a network environment. Those circuits should furthermore facilitate the development of integrated circuits within the C subprojects of the research unit.