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Fabrication of High-Speed Amorphous-Silicon Integrated Circuits

高速非晶硅集成电路的制造

基本信息

批准号：
59850062
负责人：
MATSUMURA Masakiyo
金额：
$ 4.54万
依托单位：
Tokyo Institute of Technology
依托单位国家：
日本
项目类别：
Grant-in-Aid for Developmental Scientific Research
财政年份：
1984
资助国家：
日本
起止时间：
1984 至 1985
项目状态：
已结题

来源：
https://kaken.nii.ac.jp/en/grant/KAKENHI-PROJECT-59850062/
关键词：
Thin-Film Transistor Amorphous-Silicon Integrated Circuit Thermal-Oxidation MOS Interface Diode

项目摘要

Amorphous-Silicon Thin-Film Transistors (a-Si FETs) are studying extensively, but there is a intrinsic difficulty in a-Si FETs caused by low field-effect mobility of a-Si. The object of this study is to improve FET performances by developing a novel FET fabrication process and a FET structure, and also to improve a-Si circuit performances by developing a novel circuit configuration.First, we have developed a novel thermal-oxidation method of silicon at temperatures of as low as 250゜C. Electrical properties of the oxide and its interface have been evaluated. The breakdown field strength was more than 4MV/cm, the resistivity more than <10^(14)> <omega> and the interface state density about <10^(11)> / <cm^2> eV. By using this method we have developed a nearly ideal a-Si MOS FET and showed that the FET has the mobility of as high as 2.9 <cm^2> /Vs, the on-off current ratio of more than <10^6> and half-decay time in the current of as long as <10^(10)> years.Second, we have invented a novel short channel a-Si FET structure where conventional restrictions caused by photo-lithography have been completely eliminated. Two-dimensional device simulation program has been developed and has been used to accumulate device design data. The self-aligned short-channel FET has been fabricated by using reactive ion etching method, and FET characteristics have been evaluated.Third, a novel high speed logic circuit has been proposed which is formed by a-Si FETs and a-Si Schottky barrier diodes. Computer simulation indicated that the novel circuit with 1 <micro> m FET can be operated at multi-MHz rates. A prototype device has been fabricated and its performance at 80kHz has been evaluated.

非晶硅薄膜晶体管(a-Si FET)的研究非常广泛，但a-Si的低场效应迁移率给a-Si FET带来了固有的困难。本研究的目的是通过开发新的FET制造工艺和FET结构来提高FET的性能，并通过开发新的电路结构来改善a-Si电路的性能。首先，我们开发了一种新的硅热氧化方法，其温度低至250゜C。击穿场强大于4 mV/cm，电阻率大于~lt；10^(14)&gt；omega&gt；，界面态密度约为~lt；10^(11)&gt；/&lt；cm^2&gt；ev。利用这种方法，我们研制出了一种接近理想的a-SiMOS FET，其迁移率高达2.9 cm~2/vs，通断电流比大于~lt；10^6&gt；，电流的半衰期长达~lt；10^(10)&gt；年。开发了二维器件模拟程序，并用于积累器件设计数据。采用反应离子刻蚀法制备了自对准短沟道FET，并对其特性进行了评价。第三，提出了一种由a-Si FET和a-Si肖特基势垒二极管组成的新型高速逻辑电路。计算机模拟表明，采用1&lt；Micro&mFET的新型电路可以工作在多MHz频率下。制作了一台样机，并对其在80 kHz下的性能进行了评估。