Compact Modeling and Device Simulation of TerahertzInGaAs/InP Heterojunction Bipolar Transistors

异质结双极晶体管(HBT)具有最高的功率处理能力，并通过其极高的跨导实现最高的电路速度。具有InGaAs基区的磷化铟(InP)异质结双极晶体管是第一批功率增益截止频率超过1太赫兹(THz)的异质结双极晶体管。这种性能满足了人们对(亚)毫米波应用的日益增长的兴趣，例如用于交通、健康监测和安全的雷达、成像和化学品检测。为了采用这种高速HBT技术来设计电路和系统，需要紧凑的晶体管模型，在宽的偏置、温度、频率和器件几何范围内尽可能准确地捕获测量的晶体管特性。如提案所示，不仅现有通常使用的模型的精确度不足，而且这些模型涵盖的晶体管尺寸的多样性对于上一代技术来说已经非常有限。这阻止了例如速度或能量效率的电路优化，从而阻止了半导体技术的充分利用。此外，现有的计算效率高的数值器件模拟不适用于InP HBT，因此阻碍了对相关物理效应的有价值的洞察。最后，特别是对于非线性大信号操作，通过现有的和负担得起的测量设备，对紧凑型和数值模型的验证被限制在远低于100 GHz。该项目解决了上述所有问题。主要目标是：(I)研究最快的InP HBT工艺技术的电学行为和物理效应。(2)开发以物理为基础的几何可缩放紧凑型模型和高达325 GHz的小信号核查。(3)开发一个计算效率高的双谷漂移扩散求解器。(Iv)应用一种新的片上测量方法对高达100 GHz的大信号晶体管进行表征和模型验证。

Heterojunction bipolar transistors (HBTs) possess the highest power handling capability and, through their extremely high transconductance, enable highest circuit speed. Indium-Phosphide (InP) based HBTs with an InGaAs base region are the first ones that have been demonstrated to have a power gain cut-off frequency above 1 Terahertz (THz). Such performance addresses the increasing interest in (sub-)mm-wave applications such as radar, imaging and chemicals detection for, e.g., transportation, health monitoring and security. In order to deploy such a high-speed HBT technology for designing circuits and systems, compact transistor models are required that capture measured transistor characteristics as accurately as possible over a wide bias, temperature, frequency and device geometry range. As shown in the proposal, not only is the accuracy of the existing typically used models inadequate but also is the variety of transistor sizes covered by those models very limited already for the previous technology generation. This prevents circuit optimization, e.g. for speed or energy efficiency, and thus prevents the full exploitation of a semiconductor technology. Furthermore, existing computationally efficient numerical device simulation does not work for InP HBTs, thus preventing valuable insights into the relevant physical effects. Finally, especially for nonlinear large-signal operation, validation of both compact and numerical models is limited to far below 100GHz by available and affordable measurement equipment. This project addresses all of the above mentioned issues. Major goals are: (i) Investigation of the electrical behavior and physical effects of the fastest InP HBT process technology. (ii) Development of a physics-based geometry scalable compact model and small-signal verification up to 325 GHz. (iii) Development of a computationally efficient two-valley drift-diffusion solver. (iv) Applying of a novel on-chip measurement approach for large-signal transistor characterization and model verification up to several 100GHz.