High Accuracy and High Speed Analog Integrated Circuit Using Metal Substrate SOI Structure
High Accuracy and High Speed Analog Integrated Circuit Using Metal Substrate SOI Structure
批准号:
11450117
负责人:
KOTANI Koji
金额:
$9.15万
依托单位:
依托单位国家:
日本
项目类别:
Grant-in-Aid for Scientific Research (B).
财政年份:
1999
资助国家:
日本
项目状态:
已结题
起止时间:
1999 至 2000
中文摘要
通过器件模拟分析了SOI器件的工作机理。它表明,低漏极电压操作,其中实现高的漏极电阻,也是有效的获得高漏极电阻,因此有效的实现高性能放大器,因为由于碰撞电离和穿通效应的扭结效应可以防止。设计了低摆幅放大器,有效地工作在低电压偏置。该放大器在低频区域也具有高增益,而常规放大器在低频区域表现出增益的劣化。设计了一种采用低压摆幅放大器的高精度流水线A/D转换器,基于麦克斯韦方程组,通过电磁仿真分析了保证信号准确快速传输的最佳互连结构。结果表明,金属衬底结构代替传统的硅衬底结构,可以有效地减小信号 关于我们 衰减和信号延迟,100 ps的脉冲信号可以传播长达2 mm的长度。然而,如果互连宽度小于由信号频率确定的趋肤深度,则信号传播特性会因互连本身的电阻而严重退化。气体隔离互连结构被发现是非常有效的,以防止信号退化。不同类型的SOI晶片的MOD器件的噪声特性的差异已被实验验证。研究发现,具有外延SOI层的键合SOI晶片具有最好的SOI-BOX界面特性,对降低不确定噪声和实现高精度模拟电路应用是非常有效的。研究发现,利用新开发的高密度等离子体溅射工艺形成TaNx/Ta/TaNx叠层栅电极结构,可以实现高可靠性的金属栅MOS器件。少
英文摘要
Operation mechanism of SOI devices has been analyzed by device simulation. It is revealed that low drain voltage operation, where high transconductance is achieved, is also effective for obtaining high drain resistance and therefore effective for realizing high performance amplifier since kink-effect due to impact ionization and punch-through effect can be prevented. Low voltage swing amplifier which effectively operates at low voltage bias has been designed. The amplifier has a high gain at low frequency region as well, while conventional amplifier exhibits the degradation of a gain at low frequency region. We have designed a high accuracy pipeline A/D converter utilizing low voltage swing amplifier.The best structure for interconnects in terms of accurate and rapid propagation of signals has been analyzed by electro-magnetic simulation based on Maxwell's equations. It is found that metal substrate structure instead of conventional Si substrate is very effective for minimizing signal … More attenuation and signal delay and 100ps pulse signal can propagate up to 2mm in length. If the interconnect width gets smaller than the skin depth which is determined by signal frequency, however, signal propagation characteristics are severely degraded by the resistance of the interconnect itself. Gas-isolated-interconnect structure is found to be very effective to prevent signal degradation.The difference of various types of SOI wafers has been experimentally verified in terms of the noise characteristics of MOD devices. It is found that the bonded SOI wafer having epitaxial SOI layer has the best SOI-BOX interface characteristics and is very effective for reducing uncertain noise and realizing high accuracy analog circuit applications.Process technologies to fabricate metal-gate MOS devices have been developed. It is found that highly reliable metal gate MOS devices can be realized by TaNx/Ta/TaNx stacked gate electrode structure formed by sputtering process utilizing newly developed high-density plasma. Less
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Takeo Ushiki: "Characterization of electrically active defects at SOI-BOX interface on high-dose SIMOX wafers"9th International Conference on Production Engineering. JSPE No.3. 567-572 (1999)
Takeo Ushiki:“高剂量 SIMOX 晶圆上 SOI-BOX 界面电活性缺陷的表征”第九届国际生产工程会议。
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通讯作者:
Tadahiro Ohmi, Shigetoshi Sugawa, Koji Kotani, Masaki Hirayama, Akihiro Morimoto: "New Paradigm of Silicon Technology"IEEE Proceedings. (Now Printing) Vol.89, No.3. (2001)
Tadahiro Ohmi、Shigetoshi Sukawa、Koji Kotani、Masaki Hirayama、Akihiro Morimoto:“硅技术的新范式”IEEE 论文集。
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T.Ushiki,K.Kotani,T.Funaki,K.Kawai,and T.: "Evidence of energetically-localized trap-states at SOI-BOX interface in high-dose SIMOX wafers"1999 IEEE International SOI Conference. 48-49 (1999)
T.Ushiki、K.Kotani、T.Funaki、K.Kawai 和 T.:“高剂量 SIMOX 晶圆中 SOI-BOX 界面处能量局域陷阱态的证据”1999 年 IEEE 国际 SOI 会议。
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T.Ushiki,H.Ishino,and T.Ohmi: "Effect of Starting SOI Material Quality on Low-Frequency Noise Characteristics in Partially Depleted Floating-Body SOI MOSFETs"IEEE Electron Device Letters. 21・12. 610-612 (2000)
T. Ushiki、H. Ishino 和 T. Ohmi:“启动 SOI 材料质量对部分耗尽浮体 SOI MOSFET 低频噪声特性的影响”IEEE 电子器件快报 21・12。
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Takeo Ushiki, Kunihiro Kawai, Ichiro Ohshima, and Tadahiro Ohmi: "Chemical Reaction Concerns of Gate Metal with Gate Dielectric in Ta Gate MOS Devices : An Effect Of Self-Sealing Barrier Configuration Interposed Between Ta and SiO2"IEEE Trans.on Electron
Takeo Ushiki、Kunihiro Kawai、Ichiro Ohshima 和 Tadahiro Ohmi:“Ta 栅极 MOS 器件中栅极金属与栅极电介质的化学反应问题:Ta 和 SiO2 之间插入的自密封势垒配置的影响”IEEE Trans.on Electron
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