Research and Development of Flexible Hardware and Remote Reconfiguration Techniques

灵活硬件与远程重构技术的研究与开发

基本信息

批准号：
14390041
负责人：
SUEYOSHI Toshinori
金额：
$ 7.04万
依托单位：
Kumamoto University
依托单位国家：
日本
项目类别：
Grant-in-Aid for Scientific Research (B)
财政年份：
2002
资助国家：
日本
起止时间：
2002 至 2004
项目状态：
已结题

项目摘要

The effectiveness of reconfigurable computing, a new computing paradigm and the potential abilities of reconfigurable logic device were worked out from the practical experiments and the quantitative evaluations in the research and development of flexible hardware and remote reconfiguration techniques. The following are major results in each research section.(1)Study on device architecture for flexible hardwareA mechanism of run-time reconfiguration with available LSI integration was considered. New device architecture was proposed and its effectiveness was confirmed from the evaluation.(2)Development of remote reconfiguration techniques and applied experimentsA device reconfiguration API which is independent on platforms was developed to realize remote reconfiguration, and the usefulness was shown through applied experiment using remote logic analyzer.(3)Development of reconfigurable computing support softwareGuidelines for design and development of technology mapping and place and rou … More te techniques toward next generation reconfigurable logic was made from the results of related researches and the evaluation with current EDA tools.(4)Design and prototyping of reconfigurable logicA simulation environment to investigate performance and power consumption according to device organization and hardware design tool suitable for proposed architecture were developed. A next generation FPGA was designed and was also evaluated through applicable experiment.(5)Development of software development environment and adapting to reconfigurable logicA development environment based on hardware/software co-design scheme which realizes cooperative synthesis of hardware and software from system description was developed, and its effectiveness was confirmed by using evaluation platform with embedded processor FPGA.(6)Experiment toward practical use of reconfigurable computing including remote reconfigurationGuidelines for practical use were cleared through building system using remote reconfiguration techniques and feasibility experiment with practical application having security facilities. Less

可重新配置计算的有效性，新的计算范式以及可重新配置逻辑设备的潜在能力是从实用实验中得出的，以及在灵活硬件和远程重新配置技术的研究和开发中的定量评估。以下是每个研究部分中的主要结果。（1）研究了针对运行时重新配置的柔性硬化机理的设备体系结构的研究，并考虑了可用的LSI集成。提出了新的设备体系结构，并通过评估确认了其有效性。（2）开发了远程重构技术和应用实验的设备设备重新配置API，该API独立于平台，以实现远程重构，并通过使用远程逻辑来实现远程实验来实现远程实验，以进行远程逻辑，并开发了对软件的设计……（3）设计的工具……（3）设计的工程设计……（3）设计的工程设计……（3）设计的工程设计。从相关研究的结果和当前的EDA工具的评估中制定了针对下一代可重构逻辑的技术。（4）根据设备组织和硬件设计工具的设计和原型设计，以根据设备组织和硬件设计工具来调查性能和功耗。设计了下一代FPGA，还通过适用的实验进行了评估。（5）根据硬件/软件共同设计方案的开发和适应可重新配置的Logica开发环境，该方案实现了从系统描述中开发了硬件和软件的合成，并通过对跨越的加工型进行了评估平台来确认其有效性（6）实验（6）实验（6）实验（6）实验（6）。使用远程重新配置技术和具有安全设施的实际应用实验，通过构建系统清除了用于实际使用的重新配置Guidelines。较少的

项目成果

期刊论文数量（47）

专著数量（0）

科研奖励数量（0）

会议论文数量（0）

专利数量（0）

Toshinori Sueyoshi, Morihiro Kuga, Hidetomo Shibamura: "KITE Microprocessor and CAE for Computer Science"Systems and Computers in Japan. 33・18. 64-74 (2002)

Toshinori Sueyoshi、Morihiro Kuga、Hidetomo Shibamura：“计算机科学的 KITE 微处理器和 CAE”日本系统和计算机。

DOI：
发表时间：
期刊：
影响因子：
0
作者：
通讯作者：

M.Kuga, M.Harada, Y.Ishii, Y.Kujuro, H.Shibamura, T.Sueyoshi: "Teaching Materials for System Level Design Education"Proc.of the 2003 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2003). Vol.3. 1642-1645 (20

M.Kuga、M.Harada、Y.Ishii、Y.Kujuro、H.Shibamura、T.Sueyoshi：“系统级设计教育教材”Proc.of the 2003 International Technical Conference on Circuits/Systems, Computers and Communications (