VLSI Architecture for Video Codec Based on Discrete Wavelet Transform

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In this project, we developed VLSI architecture for video codec based on discrete wavelet transform. We developed a wavelet based algorithm for scalable still-image and video compression. The algorithm adopts a modified 2-D subband decomposition scheme in conjunction with a partial zerotree search for efficient Embedded Zerotree Wavelet coding. In spite of the performance inferiority to teh conventional DWT, the algorithm attains significant reduction of DWT memory requirements, enhancing a reasonable balance between implementation cost and image quality.Furthermore, we implemented an MPEG-4 audio decoder, which is dedicated to portable audio appliances. Based on the results of sound quality evaluation, a low-power architecture is devised by means of frame-level pipeline and optimization of functional datapath. The proposed MPEG-4 audio decoder has been implemented with the use of 0.25 μm CMOS library, which integrates 30 k gates and dissipates 4.54 mW at 2.5 V supply.