Synthesis of Single Electron Devices and Investigation of Their Circuits and Systems

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We investigated a variety of single-electron (SE) and quantum dot (QD) devices and their circuits and systems to explore ways to achieve better performances and unprecedented functions, as summarized below.(l) (GaAs/AlGaAs) FETs with embedded InAs QDs were newly developed. Their memory and photodetector functions were demonstrated by trapping a single electron or hole in each dot. (2) GaSb/InAs systems were selectively oxidized by a conductive AFM tip to form a SE transistor (SET) with clearcut characteristics. (3) Novel LSI-compatible fabrication method was developed to squeeze a Si SOI-MOS channel into a quantum point contact geometry. The device exhibited clear SET characteristics even at 300K and was used to form a binary-decision current switch element. (4) Improved methods to model and simulate SE transistors and memories were developed on the basis of the master rate equation or an extended SPICE framework. Bit error rates of large scale SET systems were assessed and requirements on the normalized bit energy (Eb/kT) and residual charges were clarified. Matched filter logic circuits were proposed to avoid the inherent instability of SET systems. (5) New SET architectures, such as binary decision diagrams, majority logic, and multi-valued logic using multi-electron states, were proposed and their features clarified. (6) Moreover, the response of SE and QD systems to midinfrared (MIR) and THz waves were investigated. New MIR detectors using the photoionization of trapped electrons in QDs were successfully developed. Photon assisted tunneling processes were analysed for triple- barrier SET geometries and were shown to have responsivity ten thousand times as large as that for double barrier geometries.