Developement of Contactless and Non-Destructive Capacitance-Voltage Measurement System in Ultra-High Vacuum

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The purpose if this rsearch is to develop the "Contactless and Non-Destructive Capacitance-Voltage (C-V) Measurement System" for characterization of a conduction type, an impurity profile and a surface state density distribution of semiconductor materials in ultra-high vacuum (UHV) environment and to study various types of semiconductor surfaces such as reconstructed surfaces, processed surfaces, surfaces covered with ultrathin insulating films, etc. The main results obtained are listed below :(1) The system consists of four parts as follows : (a) An UHV chamber with a sample transfer system and a pump system, (b) a field plate which can maintain a parallelism and a constant distance of 100-300nm from a sample surface by piezo-mechanism with a capacitance feedback, (c) a UHV gap measurement part based on the optical method utilizing change in reflectivity due to penetration of evanescent wave (the Goos-Haenchen effect) and (d) a controller including C-V meter. The base pressure of the … More chamber was within the range of 10^<-10> Torr. The resolutions of a measured capacitance of 0.2fF and a UHV gap distance of 1nm were achieved, respectively.(2) The validity of the system was checked by using a SiO_2/Si metal oxide semiconductor (MOS) system. The obtained contactless C-V curve was well in agreement with the calculated ideal C-V curve.(3) The hydrogen-terminated Si surfaces showed the Fermi level pinning phenomena due to a high density of discrete surface state lying at 0.6eV above the valence band.(4) It was found that the Si surfaces covered with ultrathin oxides formed by chemical and thermal processes at temperatures below 400ﾟC had high-density interface states with narrow U-shaped continuous distributions, resulting in the Fermi level pinning near the hybrid orbital charge neutrality level.(5)The oxynitrided Si surface by ECR N_2O plasma was found to be pinning free, showing a wide, U-shaped, continuous interface state distribution with a minimum value of 1.0_x10^<11> eV^<-1>cm^<-2>. The formation of phase-separated Si_3N_4/SiO_2 interfacial structure was responsible for realization of the pinning free interface.(6) Contactless C-V results directly showed strong surface Fermi level pinning at the molecular-beam-epitaxy (MBE) grown GaAs (001) (2x4) surfaces, and the observed pinning behavior cannot be explained by the "kink-acceptor model". Less