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Study on memory characteristics of non-volatile ferroelectric-gate transistors for neural network applications

Study on memory characteristics of non-volatile ferroelectric-gate transistors for neural network applications
用于神经网络应用的非易失性铁电栅晶体管的存储特性研究
批准号:
09450123
负责人:
TOKUMITSU Eisuke
金额:
$5.7万
依托单位国家:
日本
项目类别:
Grant-in-Aid for Scientific Research (B)
财政年份:
1997
资助国家:
日本
项目状态:
已结题
起止时间:
1997 至 1998

项目摘要

项目成果

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中文摘要
翻译
本研究计划的目的是利用硅集成电路技术实现人脑神经元的基本特性--“学习”和“记忆”功能。在第一年(1997年),我们用铁电SrBi_2Ta_2O_9(SBT)薄膜制作了铁电栅场效应晶体管(FET),并演示了器件的非易失性记忆功能。还发现记忆保持时间短至1小时。因此,1998年,我们分析了铁电栅场效应晶体管的存储保持特性,指出这种短的保持时间主要是由两个原因造成的:一是在保持时间内施加了去极化场,二是工作点位于铁电薄膜的P-E特性的一个小环上。为了改善保持特性,我们制作了金属-铁电-金属-绝缘体-半导体(MFMIS)FET。通过在大的MIS结构上使用小的MFM电容器,我们发现保留时间大大改善,超过1天。接下来,我们制作了一个铁电栅FET矩阵的突触器件。证明了神经网络中常用的加权和运算可以用铁电栅FET矩阵来实现。最后,我们在SOT基底上制作神经元积体电路,使用的是单接面电晶体的铁电场效电晶体,或是CMOS的Shmit触发脉冲振荡电路。我们已经成功地证明了制造的神经元电路的学习功能。
英文摘要
The objective of this research project is to realize "learning" and "memory" functions, which are basic properties of neurons in human brains, by using silicon integrated circuits technology, In the first year (1997), we fabricated ferroelectric-gate field effect transistors (FETs) using ferroelectric SrBi_2Ta_2O_9 (SBT) film and demonstrated non-volatile memory function of the device, However, it was also found that the memory retention time was as short as 1 hour. Hence, in 1998, we analyzed the memory retention characteristics of the ferroelectric-gate FETs and showed that such short retention time was caused by mainly two reasons ; one is that depolarization field was applied during the retention time, and the second is that the operation point is on a minor loop of P-E characteristics of the ferroelectric film. To improve the retention characteristics, we fabricated metal-ferroelectric-metal-insulator-semiconductor (MFMIS) FETs. By using a small MFM capacitor on a large MIS structure, we found that the retention time was drastically improved up to more than 1 day. Next, we fabricated synaptic device which is a ferroelectric-gate FET matrix. It was demonstrated that the weighted sum operation, which is commonly used in neural networks, can be performed by the ferroelectric-gate FET matrix. Finally, we fabricated the neuron integrated circuits on SOT substrates using a ferroelectric FET with a uni-junction transistor, or CMOS Shmit-trigger pulse oscillation circuit. We have succeeded to demonstrate the learning function of the fabricated neuron circuit.
期刊论文(0)
专著(0)
科研奖励(0)
会议论文
Byung-Eun Park: "Fabrication of PbZr_xTi_<1-x>O_3 Films on Si Structures Using Y_2O_3 Buffer Layers" Jpn.J.Appl.Phys.37-1・9B. 5145-5148 (1998)
Byung-Eun Park:“使用 Y_2O_3 缓冲层在 Si 结构上制备 PbZr_xTi_<1-x>O_3 薄膜”Jpn.J.Appl.Phys.37-1・9B (1998)。
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Eisuke Tokumitsu: "Electrical Properties of MFS-FETs Using SrBi_2Ta_2O_9 Films directly Grown on Si Substrates by Sol-Gel Method" Mat.Res.Soc.Symp.Proc.493. 459-464 (1998)
Eisuke Tokumitsu:“通过溶胶-凝胶法直接在 Si 基板上生长的 SrBi_2Ta_2O_9 薄膜的 MFS-FET 的电性能”Mat.Res.Soc.Symp.Proc.493。
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E.Tokumitsu, G.Fujii, and H.Ishiwara: "Electrical Properties of MFS-FETs Using SrBi_2Ta_2O_9 Films directly Grown on Si Substrates by Sol1-Gel Method" Mat.Res.Soc.Symp.Proc.493. 459-464 (1998)
E.Tokumitsu、G.Fujii 和 H.Ishiwara:“通过 Sol1-Gel 方法直接在 Si 衬底上生长的 SrBi_2Ta_2O_9 薄膜的 MFS-FET 的电性能”Mat.Res.Soc.Symp.Proc.493。
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Eisuke Tokumitsu: "Nonvolatile Memory Operations of Metal-Ferroelectric-Insulator-Semiconductor (MFIS) FET's Using PLZT/STO/Si(100)Structures" IEEE Electron Device Letters. 18・4. 160-162 (1997)
Eisuke Tokumitsu:“使用 PLZT/STO/Si(100) 结构的金属铁电绝缘体半导体 (MFIS) FET 的非易失性存储器操作”IEEE 电子器件快报 18・4 (1997)。
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