Demonstrating SiC CMOS with a self-aligned gate

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Silicon Carbide is a wide band-gap semiconductor with exceptional properties for power electronics, covered in the keynote at the recent SEP showcase (York). Commercial SiC MOSFETs are limited by poor current carrying capability, gate oxide quality and corresponding low operating temperature (175C). With UPE funding (EP/R00448X/1) we obtained 10x improvement for nMOSFETs (DOI:10.1109/TED.2019.2901310) by nm scale re-engineering the gate that will likely improve reliability and operation temperature. Confirming pMOSFET and developing a self-aligned gate will be an achievement of international significants, enhancing smart SiC power electronics (smaller footprint and higher operational temperature compared with Si).