FPGA high-level synthesis and virtualization

FPGA高级综合和虚拟化

• 批准号: 492938-2015
• 负责人: Anderson, Jason
• 金额: $ 2.74万
• 依托单位: University of Toronto
• 依托单位国家: 加拿大
• 项目类别: Collaborative Research and Development Grants
• 财政年份: 2018
• 资助国家: 加拿大
• 起止时间: 2018-01-01 至 2019-12-31
• 项目状态: 已结题
• 来源: https://www.nserc-crsng.gc.ca/ase-oro/Details-Detailles_eng.asp?id=643932
• 关键词: FPGA; level; synthesis; virtualization

There are two ways to perform computations: in software or in hardware. The software approach is widely used and the skills are readily available. However, the use of software running on a processor imposes significant overheads in terms of speed and energy efficiency, owing to the need to fetch and decode instructions, store results in memory, and so on. Hardware, on the other hand, can bring orders of magnitude improvement in speed and energy efficiency to computing. However, hardware design requires specialized skills, is time intensive, and error prone. The overarching aim of the proposed research is to bring the speed and energy benefits of hardware to those having solely software skills.** High-level synthesis (HLS) refers to the automated synthesis of a software program into a hardware circuit that performs the same function as the software. The faculty applicant leads the LegUp high-level synthesis project (http://legup.eecg.toronto.edu) at the University of Toronto, which automatically translates a C language program into a hardware circuit. The present grant aims to improve the quality (performance, power, and cost) of the automatically generated hardware to the point of being on par with human-expert-crafted hardware. A second HLS direction concerns defining a standard methodology for comparing one HLS tool with another. A third direction pertains to synthesizing hardware directly from an executable binary, rather than source code.** The second research package in the grant relates to "virtualization" of field-programmable gate arrays (FPGAs), which are specialized computer chips whose function can be set by the end user. FPGAs are widely used to implement custom computing accelerators, where, in conjunction with standard processors, can be leveraged to improve computational throughput and energy efficiency. FPGA virtualization seeks to make FPGAs easily useable within cloud/datacentre environments, where they can be flexibly used for a wide variety of computing tasks.

有两种方法来执行计算：在软件中或在硬件中。 软件方法被广泛使用，技能也很容易获得。 然而，在处理器上运行的软件的使用在速度和能量效率方面强加了显著的开销，这是由于需要获取和解码指令、将结果存储在存储器中等。另一方面，硬件可以为计算带来速度和能量效率的数量级改进。 然而，硬件设计需要专门的技能，是时间密集型的，并且容易出错。 这项研究的首要目标是将硬件的速度和能源效益带给那些只拥有软件技能的人。 高级综合（HLS）是指将软件程序自动综合为执行与软件相同功能的硬件电路。教师申请人在多伦多大学领导LegUp高级综合项目（http：legup.eecg.toronto.edu），该项目自动将C语言程序转换为硬件电路。 目前的资助旨在提高自动生成硬件的质量（性能，功耗和成本），使其与人类专家制作的硬件不相上下。 HLS的第二个方向涉及定义一种标准方法，用于将HLS工具与其他工具进行比较。 第三个方向涉及直接从可执行的二进制文件而不是源代码合成硬件。** 第二个研究项目涉及现场可编程门阵列（FPGA）的“虚拟化”，FPGA是一种功能可由最终用户设置的专用计算机芯片。 FPGA被广泛用于实现定制计算加速器，与标准处理器结合使用，可以提高计算吞吐量和能效。 FPGA虚拟化旨在使FPGA在云/数据中心环境中易于使用，在那里它们可以灵活地用于各种计算任务。