Studies in Instruction-Level Parallel Processing

本研究针对指令级并行(ILP)处理器进行研究。我们的目标是开发在执行任意非数值应用程序(如编译器、模拟器、CAD、文本处理和数据库程序)时，每个周期可以支持10条以上指令的处理器。本研究在前人对ILP研究的基础上，扩展了ILP处理器的研究基础。正在继续开发一种用于ILP处理器的新范式--多标量处理范式，其目标是将多标量范式带入处理器设计的主流。使用详细的仿真模型研究了与多标量处理器的操作相关的问题，如数据存储系统、指令存储系统、互操作通信机制以及任务的指定和执行。还研究了对多标量处理器的软件支持。

This research investigates instruction-level parallel (ILP) processors. The goal is to develop processors that can sustain over 10 instructions per cycle when executing arbitrary non-numeric applications such as compilers, simulators, CAD, text processing, and database programs. The research builds on the previous studies of ILP to expand the foundation for ILP processors. A novel paradigm for ILP processors, the multiscalar processing paradigm, continues to be developed, with the goal of bringing the multiscalar paradigm into the mainstream of processor design. Issues relevant to the operation of a multiscalar processor such as data memory systems, instruction memory systems, inter-operation communication mechanisms, and task specification and execution, are studied using detailed simulation models. Also investigated is software support for multiscalar processors.