Physics of Charge Damage in High Density Plasma Etchers

9800461陈计算机芯片的复杂性和性能一直在以惊人的速度前进。 集成电路小型化的这些进展是通过在半导体芯片中的精细特征的蚀刻中使用等离子体（电离气体）以及在小空间中沉积绝缘层和导电层而实现的。 到目前为止，问题一直是产生高密度等离子体（HDPS），这种等离子体可以在12英寸直径的硅片上产生均匀的正电荷离子流，在硅片上可以同时制造数百个芯片，每个芯片包含数百万个晶体管。 为了帮助满足这一需求，一种新的“感应”等离子体源，螺旋源，在NSF的赞助下，由加州大学洛杉矶分校的小组进行了六年的深入研究。 等离子体的产生不再是工业界的主要关注点，然而，一个更紧迫的问题出现了，那就是电荷引起的对薄绝缘层的损伤，通常是二氧化硅，它用来绝缘晶体管的输入端（“栅极”）。 随着晶体管的设计越来越小，栅极必须按比例越来越薄，达到小于50 A（或5 nm）的厚度。 这些薄栅极在等离子体处理期间容易受到损坏。 电荷会在晶体管上积聚，导致内部缺陷，使整个晶体管无法使用。 这是在晶片上保持良好芯片的高产率的严重问题。 虽然氧化物损伤的统计数据已经被记录在案，但损伤的原因还没有很好地了解。 最初，人们认为磁场和等离子体的不均匀性是电荷不平衡的原因。 近年来，有人提出“电子遮蔽”（electron shading）现象是一种更为严重的效应，即电子无法到达图案化晶片的深沟槽底部。但在日本以外的地区，几乎没有进行基本的实验来阐明电荷损伤的原因，从而提出了防止电荷损伤的想法。 本计画旨在设计并执行高密度射频电浆源之充电效应量测实验。 特别是，我们计划解决两个方面的电荷积累，这是没有被检查其他地方：1）脉冲充电，只发生在某些阶段的RF周期，和2）充电由于低频不稳定性发生在磁化等离子体源。

9800461ChenThe complexity and performance of computer chips have been advancing at an amazing rate. These advances in miniaturization of integrated circuits have been made possible by the use of plasmas (ionized gases) in the etching of fine features in semiconductor chips and the deposition of insulating and conducting layers into small spaces. Up to now the problem has been to generate high-density plasmas (HDPS) that can produce a uniform flux of positively charged ions over a 12-inch diameter silicon wafer, on which hundreds of chips, each containing millions of transistors, can be made simultaneously. To help fulfill this need, one of the new "inductive" plasma sources, the helicon source, was intensely studied by the UCLA group under NSF sponsorship for six years. Plasma production is no longer a primary concern of the industry.Amore urgent problem has arisen, however, and that is charge-induced damage to thin insulating layers, usually silicon dioxide, that are used to insulate the input terminals ("gates") of transistors. As designers make the transistors ever smaller, the gates have to be ever thinner in proportion, reaching thicknesses of less than 50A (or 5 nm). These thin gates are subject to damage during plasma processing. Electrical charges can build up on them and cause internal defects that can render the entire transistor useless. This is a serious problem in maintaining a high yield of good chips on a wafer. Though the statistics of oxide damage has been documented, the cause of the damage is not yet well understood. Originally, it was thought that magnetic fields and plasma nonuniformities were the causes of the charge imbalance. More recently, it has been suggested that the "electron shading" phenomenon, in which electrons are blocked from reaching the bottoms of deep trenches in patterned wafers, is a much more serious effect.Few basic experiments have been performed, especially outside of Japan, to elucidate the causes of charge damage, leading to ideas for its prevention. This proposal is to design and perform experiments to measure charging effects in high-density RF plasma sources. In particular, we plan to tackle two aspects of charge buildup which are not being examined elsewhere: 1) pulsed charging which occurs only in certain phases of the RF cycle, and 2) charging due to low-frequency instabilities occurring in magnetized plasma sources.