CRI: A MASSIV Cluster for Designing Chip Multiprocessors

回顾分析计划：NSF 04-588简明计算研究基础设施标题：CRI用于设计芯片多处理器的大规模集群建议：CNS 0551401PI：Hill，Mark D.机构：威斯康星大学麦迪逊分校的研究人员将获得以大内存和存储容量为特色的计算集群基础设施，这将促进在单个处理器上设计多个处理器的研究。计算集群将使该团队能够通过模拟和评估针对未来大型工作负载进行测试的设计来研究创新的新设计。研究将着眼于以下创新：基于日志的事务存储器以简化多线程编程、使用硬件来帮助多线程调试、将令牌一致性用于积极的CMP存储器层次结构、使用压缩来扩大CMP上的高速缓存并降低对脱离CMP的带宽需求、利用用于新型高速缓存体系结构的CMP上的传输线、促进推测性并行化和多线程、处理不断增加的存储器延迟、将系统密集型工作负载在新型CMP微体系结构上的执行并行化、将健壮、可靠的软件的性能影响降至最低，以及探索诸如相干去耦合之类的新方法来解决高速缓存一致性。该项目的更广泛影响包括培训、行业伙伴关系以及与其他研究小组共享评估基础设施和模拟工作量。

Review AnalysisProgram: NSF 04-588 CISE Computing Research InfrastructureTitle: CRI A MASSIV Cluster for Designing Chip Multiprocessors Proposal: CNS 0551401PI: Hill, Mark D.Institution: University of Wisconsin-Madison Researchers at the University of Wisconsin, Madison will acquire a computing cluster infrastructure, distinguished by large memory and storage capacity, that will facilitate research on designs for multiple processors on a single. The compute cluster will enable the group to research innovative new designs through simulation and evaluation of designs that are tested against large, future workloads. Research will look at innovations such as log-based transactional memory to ease multithreaded programming, using hardware to aid multithreaded debugging, leveraging token coherence for aggressive CMP memory hierarchies, using compression to enlarge on-CMP caches and reduce off-CMP bandwidth requirements, exploiting on-CMP transmission lines for novel cache architectures, facilitating speculative parallelization and multithreading, handling increasing memory latencies, parallelizing the execution of system-intensive workloads on novel CMP micro-architectures, minimizing the performance impacts of robust, reliable software, and exploring new ways such as coherence decoupling to address cache coherence. Broader impacts of this project include training, industry partnerships, and sharing the evaluation infrastructure and simulated workloads with other research groups.