CPA-CSA-T: Low Cost and Comprehensive Hardware Reliability

在后期的cmos时代，硬件可靠性正成为人们日益关注的问题。发运的芯片中的组件将由于许多原因而发生故障，需要机制来检测、诊断、恢复和修复/重新配置这些出现故障的组件，以便系统能够提供可靠的操作。问题在广阔市场中的普遍存在需要低成本和通用的可靠性解决方案，这些解决方案可以部署在运行具有不同可靠性要求的应用程序的通用商用系统中。涉及过多冗余的传统可靠性解决方案过于昂贵，解决个别故障模式的零碎解决方案也是如此。这项工作提出了一个完整的系统解决方案，旨在为各种硬件故障模式提供错误检测、诊断、恢复和修复/重新配置的通用框架，并在可靠性和开销之间进行可定制的权衡。首先，硬件可靠性解决方案只需要处理通过更高级别的系统传播并对软件可见的设备故障。其次，尽管存在可靠性威胁，但无故障操作仍然是常见情况，必须进行优化，一旦检测到故障，可能会以增加开销为代价。因此，建议的系统通过监视异常软件行为(或故障症状)来检测故障，使用新的零到低成本硬件和软件监视器。检测到故障后，它调用一种创新的、但可能代价高昂的程序来诊断故障源，以实现重新配置/修复(在发生硬故障的情况下)。对于恢复，它依赖检查点/重放机制，包括纯硬件和混合软件辅助恢复，具体取决于检测延迟。协调以上所有功能的是一个可提供灵活性和可定制性的薄固件层。这项工作的一个主要组成部分是非常需要的微体系结构级故障模型的制定和验证，这是驱动高级别可靠性解决方案所必需的。

Hardware reliability is becoming an increasing concern in the late CMOS era. Components in shipped chips will fail for many reasons, requiring mechanisms to detect, diagnose, recover from, and repair/reconfigure around these failed components so that the system can provide reliable operation. The pervasiveness of the problem across a broad market demands low-cost and general reliability solutions that can be deployed in general-purpose, commodity systems running applications with varying reliability requirements. Traditional reliability solutions involving excessive redundancy are too expensive, as are piecemeal solutions that address individual failure modes. This work proposes a full system solution that aims to provide a common framework for error detection, diagnosis, recovery, and repair/reconfiguration for a variety of hardware failure modes, with a customizable reliability vs. overhead tradeoff.Two key high-level observations motivate the approach. First, the hardware reliability solutions need handle only the device faults that propagate through higher levels of the system and become observable to software. Second, in spite of the reliability threat, fault-free operation remains the common case and must be optimized, possibly at the cost of increased overhead once a fault is detected. The proposed system therefore detects faults by watching for anomalous software behavior (or symptoms of faults), using novel zero to low-cost hardware and software monitors. After a fault is detected, it invokes an innovative, but potentially expensive, procedure for diagnosing the fault source to enable reconfiguration/repair (in the case of hard faults). For recovery, it relies on a checkpoint/replay mechanism, including pure hardware and hybrid software assisted recovery depending on detection latency. Coordinating all of the above is a thin firmware layer that provides flexibility and customizability. A major component of the work is a much needed formulation and validation of microarchitecture level fault models, required to drive high-level reliability solutions.