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NSF Workshop; Electronic Design Automation -- Past, Present, and Future

NSF Workshop; Electronic Design Automation -- Past, Present, and Future
美国国家科学基金会研讨会;
批准号:
0930477
负责人:
Jason Cong
金额:
$5.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2009
资助国家:
美国
项目状态:
已结题
起止时间:
2009-08-01 至 2010-07-31

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中文摘要
翻译
CCF - 0930477 NSF研讨会;电子设计自动化-过去、现在和未来 超大规模集成电路(VLSI)和系统的电子设计自动化(EDA)是计算机科学与工程的一个重要领域。 它对信息技术的发展产生了重大影响?特别是在支持摩尔?在过去的40年里,我们一直在遵循“信息技术法”,这反过来又创造了性能和成本效益高的信息技术基础设施,改变了我们的生活和整个社会。 EDA的成功在科学和社会方面都具有很大的启发性,但同时EDA领域也面临着严峻的挑战。例如,与VLSI电路设计相关的非经常性工程(NRE)成本正在飙升,估计每个ASIC设计超过3000万美元。 单个芯片上可用的晶体管数量的快速增加导致片上系统集成,软件和硬件,数字和模拟等之间的复杂交互。范围从非常高性能的微处理器和信号处理器到广泛的低功率便携式设备,再到由非常低的单位成本和极低的操作功率驱动的芯片的微感测/通信/致动网络。 设计人员必须创建在传统数字和混合信号操作中正常运行的芯片,以及理解对来自许多物理领域(如压力,温度,化学和光学)的信号做出响应的传感器。由于引入了许多新的物理现象,决定了严重缩放的半导体器件的性能,设计问题进一步复杂化。例如,晶体管的功率和性能特性在本质上变得统计。 在32 nm或更低的新一代CMOS器件或新兴的非CMOS器件中,软错误或永久错误的概率要高得多。 在2006年由NSF和SRC联合举办的早期研讨会上,提出了通过国家设计倡议增加设计技术和工具研究的建议。这样的努力被认为是至关重要的?保持美国在集成纳米和微系统设计方面的领导地位。本次研讨会将审查在国家设计倡议下取得的进展,并评估是否应在该倡议中增加新的方向和主题。本次研讨会的建议将有助于影响NSF的设计自动化资助计划。
英文摘要
CCF - 0930477 NSF Workshop; Electronic Design Automation -- Past, Present, and FutureCong, Jason University of California-Los Angeles ABSTRACTElectronic design automation (EDA) of very large-scale integrated (VLSI) circuits and systems is an important field in computer science and engineering. It has made a significant impact on the development of information technology?in particular in supporting the successful scaling of Moore?s Law over the past 40 years, which in turn has created the performance and cost-efficient information technology infrastructure that has transformed our lives and all of society. The success of the EDA is inspiring for many scientific and societal reasons.At the same time, the EDA field is facing serious challenges. For example, Non-Recurring Engineering (NRE) costs associated with VLSI circuit design are skyrocketing with estimates of over $30M per ASIC design undertaken. The rapid increase in the number of transistors available on a single chip leads to system-on-chip integration, with complex interactions between software and hardware, digital and analog, etc. Moreover, the field of applications enabled by semiconductor technology is growing at a rapid rate?ranging from very high performance microprocessors and signal processors to a broad array of low-power portable devices to micro sense/communicate/actuate networks of chips driven by very low per-unit cost and extremely low operating power. Designers must create chips that function properly in conventional digital and mixed-signal operation, as well as comprehend sensors that respond to signals from many physical domains such as pressure, temperature, chemical, and optical. The design problem is further compounded by the introduction of many new physical phenomena determining the performance of severely scaled semiconductor devices. For example, the power and performance characteristics of transistors are becoming statistical in nature. The probability of soft or permanent errors is much higher in the new generation of CMOS devices at 32nm or below or in new emerging non-CMOS devices. These present unprecedented challenges.In an earlier workshop jointly held in 2006 by the NSF and SRC a recommendation was made that research in design technology and tools be increased through a National Design Initiative. Such an effort was deemed to be critical ?to maintain U.S. leadership in design for integrated nano- and Microsystems.? The present workshop is to review the progress made under the National Design Initiative and evaluate whether new directions and topics should be added to the Initiative. The recommendations from this workshop will help to influence the design automation funding programs at the NSF.
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