CSR: Small: Collaborative Research: Cross-Layer Design Techniques for Robustness of the Next-Generation Nonvolatile Memories
CSR: Small: Collaborative Research: Cross-Layer Design Techniques for Robustness of the Next-Generation Nonvolatile Memories
批准号:
1116171
负责人:
Yiran Chen
金额:
$22.5万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2011
资助国家:
美国
项目状态:
已结题
起止时间:
2011-09-01 至 2015-08-31
中文摘要
研究的目的是开发设计技术,以减轻下一代非易失性存储器的一般鲁棒性问题,同时保持甚至提高一般存储器的规格,如密度,功率和性能。从架构、电路和器件层集成了全面的解决方案,以提高新兴非易失性存储器的密度、成本和可靠性。设计技术包括:1)采用自包含电路监测和控制的编码和损耗均衡技术,提高多层单元器件的写入寿命,延长新型非易失性存储器的使用寿命;2)自参考和其他自适应传感技术,以克服工艺变化和设备磨损机制的影响,提高良率;3)新的交错3d堆叠存储器集成方案和外围电路设计,以增加在一定高度内集成的堆栈数。该研究更广泛的影响在于揭示了应用跨层设计技术来解决下一代NVMs的鲁棒性问题的重要性以及对鲁棒性设计背景的关注。系统架构师、电路设计师和器件集成工程师可以很好地通过研究创新进行沟通和教育。通过与多个行业伙伴的密切合作,所开发的技术可以直接转移到行业应用中,并直接影响未来的计算系统。合作的活动还包括在主要会议上就项目的技术方面和新课程的发展提供指导。
英文摘要
The objective of the research is to develop design technologies that can alleviate the general robustness issues of the next-generation nonvolatile memories while maintaining and even improving the generic memory specifications such as density, power and performance. Comprehensive solutions are integrated from architecture, circuit and device layers for the improvement on the density, cost and reliability of emerging nonvolatile memories. The design techniques include 1) a new write endurance improvement technique for multi-level cell devices to prolong the lifetime of the new nonvolatile memories by applying the coding and wear-leveling techniques that are monitored and controlled by self-contained circuits; 2) self-reference and other adaptive sensing techniques to overcome the impacts of process variations and device wear-out mechanisms for yield improvement.; and 3) a new interleaved 3D-stacking memory integration scheme and peripheral circuit design to increase the number of stacks integrated within a certain height. The broader impact of the research lies in revealing the importance of applying cross-layer design techniques to resolve the robustness issues of the next-generation NVMs and the attentions to the robust design context. The system architects, the circuit designers and the device integration engineers can be well bridged and educated by the research innovations. The developed techniques can be directly transferred to industry applications under the close collaborations with several industry partners, and directly impact the future computing systems. The activities in the collaboration also include the tutorials in the major conferences on the technical aspects of the projects and new course development.
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