EAGER: Wafer Scalable Dry Transfer of Graphene onto Silicon Substrates
EAGER: Wafer Scalable Dry Transfer of Graphene onto Silicon Substrates
批准号:
1444398
负责人:
Deji Akinwande
金额:
$13.25万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2014
资助国家:
美国
项目状态:
已结题
起止时间:
2014-08-01 至 2016-01-31
中文摘要
EAGER:石墨烯在硅衬底上的晶圆可扩展干转移非技术性:将石墨烯与硅技术相结合被广泛认为是将石墨烯研究从学术实验室转化为实际商业应用的最大前景之一。这种异质纳米技术可以受益于硅电子学的成熟性和复杂性,同时利用石墨烯出色的电子、机械、光学、热学和传感器特性,在半导体芯片上实现先进的器件。尽管人们广泛认识到需要将石墨烯与硅集成,但进展非常有限,这主要是由于难以以与半导体技术兼容的良性方式从其生长表面去除石墨烯。几种转移方法,如湿剥离转移和电化学分层,是方便的小样品,是不可扩展到全晶片尺寸,这是需要实际的非常大规模集成与硅。在这项工作中,我们提出了一个晶圆规模的石墨烯到硅衬底上的干转移,提供了几个优点,包括无污染的石墨烯表面。所提出的干转移方法是与硅技术兼容的低温方法。这一努力有可能克服实际石墨烯-硅集成的最大障碍。这一努力的结果预计将导致未来的学术行业合作伙伴关系的商业应用,可以造福于更广泛的社会。技术支持:石墨烯是一种相对较新的先进纳米材料,具有许多独特和突出的特性,可以使半导体技术受益,半导体技术是计算机芯片,移动的手机和便携式电子产品的支柱。然而,由于电流限制,难以将石墨烯集成到硅半导体芯片上,这需要在不适合于半导体电子器件的金属衬底(例如铜)上生长膜。此外,单层石墨烯是已知最薄的材料,非常脆弱,并且在基于现有化学或基于溶液的方法的膜转移期间容易撕裂。在这项研究中,我们探索了使用小的可控机械力将石墨烯从其原始衬底直接剥离到硅半导体芯片上的想法。初步结果表明,这一想法是可行的,进一步的研究将增加石墨烯集成到商用计算机和电子芯片上的前景,以造福社会。此外,从事这项研究工作的研究生和博士后研究人员将获得成为工业、学术界或政府研究生职业技术领导者所需的先进科学和工程技能。此外,来自不同背景的本科生将被招募参加研究工作,以促进先进的科学和工程事业。
英文摘要
EAGER: Wafer Scalable Dry Transfer of Graphene onto Silicon SubstratesNon-technical: Integrating graphene with silicon technology is widely considered among the greatest prospects for translating graphene research from academic laboratories to practical commercial applications. This heterogeneous nanotechnology can benefit from the maturity and complexity of silicon electronics while taking advantage of the outstanding electronic, mechanical, optical, thermal and sensor properties of graphene to realize advanced devices on semiconductor chips. Despite the broad recognition of the need to integrate graphene with silicon, progress has been very limited largely due to the difficult of removing graphene from its growth surface in a benign manner compatible with semiconductor technology. Several transfer methods such as wet lift-off transfer, and electrochemical delamination that are convenient for small samples, are not scalable to full wafer sizes, which are required for practical very large scale integration with silicon. In this effort, we propose a wafer-scalable dry transfer of graphene onto silicon substrates that offers several advantages including a contamination-free graphene surface. The proposed dry transfer method is a low temperature method compatible with silicon technology. This effort has the potential to overcome the biggest barrier for practical graphene-silicon integration. The results of this effort is expected to lead to future academic industry partnerships for commercial applications that can benefit the broader society. Technical: Graphene is a relatively new advanced nanomaterial that has many unique and outstanding properties that could benefit semiconductor technology, which is the backbone of computer chips, mobile phones, and portable electronics. However, it has been difficult to integrate graphene onto silicon semiconductor chips owing to the current constrain that requires growing the film on a metallic substrate such as copper which is not suitable for semiconductor electronics. Furthermore, single layer graphene, which is the thinnest known material is very fragile and susceptible to tears during film transfer based on existing chemical or solution-based methods. In this research, we explore the idea of using small controllable mechanical forces to directly peel graphene from its original substrate directly onto silicon semiconductor chips. Preliminary results indicate this idea is feasible and further research will increase the prospects for graphene integration onto commercial computer and electronic chips to benefit society. In addition, the graduate student and post-doctoral researchers working on this research effort will gain advanced scientific and engineering skills needed to be technical leaders in industry, academia or government post-graduate careers. Moreover, undergraduate students from diverse backgrounds will be recruited to participate in the research effort to promote advanced science and engineering careers.
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