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E2CDA: Type II: 2D Electrostrictive FETs for Ultra-Low Power Circuits and Architectures

E2CDA: Type II: 2D Electrostrictive FETs for Ultra-Low Power Circuits and Architectures
E2CDA:II 类:用于超低功耗电路和架构的 2D 电致伸缩 FET
批准号:
1640020
负责人:
Saptarshi Das
金额:
$40.0万
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
2016
资助国家:
美国
项目状态:
已结题
起止时间:
2016-10-01 至 2020-09-30

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中文摘要
翻译
21世纪有望蓬勃发展的新型电子系统,消耗电力如此之少,甚至周围的能量收集可以满足他们的所有需求。传统的硅基CMOS技术,尽管在过去的四十年里已经多次改变了我们的日常生活,但由于mosfet的底层物理特性的基本限制,似乎无法实现这一目标。因此,该项目的目标是在各个层面上进行创新:从材料工程到设备物理到电路设计到架构实现,以实现同时提供能源效率和高性能的电子系统。这些系统可用于植入式医疗设备、柔性电子设备、自供电远程传感器以及各种物联网设备等。然而,除非将科学和技术成果传播到社会各阶层,否则就无法有效地利用这些成果。因此,教育外展将是这个项目的一个组成部分,将所产生的知识传递给本科生、毕业生和代表性不足的群体,以便产生真正和持久的影响。pi将组织讲习班和研讨会,编写课程材料,并与社区学院和四年制大学的教师建立教育合作,以传播研究成果。从技术角度来看,该项目旨在通过实验实现一种基于二维(2D)材料动态带结构工程的新型、陡坡、积极扩展和节能晶体管,并利用所提出器件的独特特性来实现超低功耗电路和架构。二维材料为层状化合物,层内共价相互作用强,层间范德华相互作用弱。这种晶体管被称为二维电致伸缩场效应晶体管(2D-EFET),其工作原理是电压感应应变转导。它使用电致伸缩材料作为栅极氧化物,响应施加的栅极偏置而膨胀,从而在2D通道材料上产生面外应力。这种应力减少了半导体二维材料连续层之间的层间距离,并动态地将其带隙减小到零,即将其转换为半金属。因此,该器件在关闭状态下具有较大的带隙,而在打开状态下具有较小或为零的带隙。由于这种转导机制,内部电压放大发生,导致陡峭的开关。陡峭开关可以实现积极的电压缩放,通过适当的器件电路协同设计,可以实现超低功耗和稳健的电路运行。这些特性对于高度并行的吞吐量导向架构和固有的低电压设计(例如由能量收集供电的物联网节点)都非常有吸引力,从而解决了计算频谱两端的需求。采用2d - efet作为电路和架构设计师的标准元件,在能源效率方面的预期收益是什么?S工具包被发现足够大,对于某些领域,是变革性的。
英文摘要
The 21st century promises to thrive on novel electronic systems that consume power so frugally that even ambient energy harvesting can supply all of their needs. Conventional silicon-based CMOS technology, despite having repeatedly revolutionized our everyday life for the last four decades, appears incapable of delivering on this objective due to fundamental limitations in the underlying physics of MOSFETs. The goal of this project is, therefore, to execute innovation at all levels: from materials engineering to device physics to circuit design to architectural implementations in order to achieve electronic systems that simultaneously offer energy efficiency and high performance. These systems can then be used for implantable medical devices, flexible electronic appliances, self-powered remote sensors and also for various devices involved in the Internet-of-Things and so on. Scientific and technological successes, however, will not be effectively leveraged unless disseminated to all sections of society. Educational out-reach will, therefore, be an integral part of this project to transmit the knowledge generated to undergraduates, graduates and under-represented groups in order to have real and lasting impact. The PIs will organize workshops and seminars, develop course materials and establish educational collaborations with instructors from community colleges and 4-year universities to disseminate the research results. From technical stand point, this project aims to experimentally realize a novel, steep slope, aggressively scalable and energy efficient transistor based on dynamic band structure engineering in two-dimensional (2D) materials, and to exploit the unique characteristics of the proposed device to enable ultra-low power circuits and architectures. The 2D materials are layered compounds with strong intra-layer covalent interaction and weak van der Waals inter-layer interaction. This transistor, referred to as the two-dimensional electrostrictive field effect transistor (2D-EFET) works on the principle of voltage induced strain transduction. It uses an electrostrictive material as a gate oxide that expands in response to an applied gate bias and thereby, transduces an out-of-plane stress on the 2D channel material. This stress reduces the inter-layer distance between the consecutive layers of the semiconducting 2D material and dynamically reduces its bandgap to zero i.e. converts it into a semi-metal. Thus the device operates with a large bandgap in the OFF state and a small or zero bandgap in the ON state. As a consequence of this transduction mechanism, internal voltage amplification takes place which results in steep switching. The steep switching enables aggressive voltage scaling, which, with proper device-circuit co-design, leads to ultra-low power and robust circuit operation. These properties are very attractive for both highly parallel throughput-oriented architectures and inherently low-voltage designs, such as IoT nodes powered by energy harvesting, thereby addressing needs across both ends of the computing spectrum. The expected gain in energy efficiency from adopting 2D-EFETs as a standard element of the circuit and architecture designer?s toolkit is found to be large enough, for some domains, to be transformative.
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